
Philips Semiconductors
DSPCPU Operations for TM1300
PRODUCT SPECIFICATION
A-153
Read data cache address tag
SYNTAX
[ IF rguard ] rdtag(d) rsrc1
→
rdest
FUNCTION
if
rguard
then {
block_addr
←
rsrc1+ d
/* block_addr<13:11> selects element, block_addr<10:6> selects set */
rdest<21:0>
←
dcache_tag_block(block_addr)
rdest<31:22>
←
0
}
ATTRIBUTES
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
dmemspec
202
1
7 bits
–256..252 by 4
3
5
DESCRIPTION
The
rdtag
operation reads the address tag associated with a block in the data cache and writes these bits into the
destination register rdest The target block in the data cache is determined by bits 13..6 of the result of rsrc1 + d Bits
10..6 of rsrc1 + d select the cache set and 13..11 of rsrc1 + d select the element within that set. The d value is an
opcode modifier, must be in the range –256 to 252 inclusive, and must be a multiple of 4.
rdtag
writes the address tag for the selected block in bits 21..0 of rdest All other bits of rdestare set to zero.
rdtag
requires no stall cycles to complete.
The dual-ported data cache uses two separate copies of tag and status information. A
rdtag
operation returns the
address tag information stored in the cache port that corresponds to the operation slot in which the
rdtag
operation
is issued.
The
rdtag
operation optionally takes a guard, specified in rguard If a guard is present, its LSB controls the
modification of the destination register. If the LSB of rguardis 1, rdestis written; otherwise, rdestis not changed.
EXAMPLES
Initial Values
Operation
Result
rdtag(0) r30
→
r60
IF r10 rdtag(4) r40
→
r70
IF r20 rdtag(8) r50
r10 = 0
r20 = 1
no change, since guard is false
→
r80
SEE ALSO
rdstatus
rdtag