
Philips Semiconductors
DSPCPU Operations for TM1300
PRODUCT SPECIFICATION
A-85
Signed sum of products of unsigned/signed
bytes
SYNTAX
[ IF rguard ] ifir8ui rsrc1 rsrc2
→
rdest
FUNCTION
if
rguard
then
rdest
←
zero_ext8to32(rsrc1<31:24>)
×
sign_ext8to32(rsrc2<31:24>) +
zero_ext8to32(rsrc1<23:16>)
×
sign_ext8to32(rsrc2<23:16>) +
zero_ext8to32(rsrc1<15:8>)
×
sign_ext8to32(rsrc2<15:8>) +
zero_ext8to32(rsrc1<7:0>)
×
sign_ext8to32(rsrc2<7:0>)
ATTRIBUTES
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
dspmul
91
2
No
—
3
2, 3
DESCRIPTION
As shown below, the
ifir8ui
operation computes four separate products of the four pairs of corresponding 8-bit
bytes of rsrc1 and rsrc2 the four products are summed, and the result is written to rdest The bytes from rsrc1 are
considered unsigned, but the bytes from rsrc2 are considered signed; thus, the intermediate products and the final
sum of products are signed. All computations are performed without loss of precision.
The
ifir8ui
operation optionally takes a guard, specified in rguard If a guard is present, its LSB controls the
modification of the destination register. If the LSB of rguardis 1, rdestis written; otherwise, rdestis not changed.
EXAMPLES
Initial Values
Operation
Result
r70 = 0x0afb14f6, r30 = 0x0a0a1414
r10 = 0, r70 = 0x0afb14f6, r30 = 0x0a0a1414
r20 = 1, r80 = 0x649c649c, r40 = 0x9c649c64
r50 = 0x80808080, r60 = 0xffffffff
ifir8ui r30 r70
→
r90
IF r10 ifir8ui r30 r70
→
r100
IF r20 ifir8ui r40 r80
→
r110
ifir8ui r60 r50
→
r120
r90
←
0xfa
no change, since guard is false
r110
←
0x2bc0
r120
←
0xfffe0200
0
1
3
rsrc1
0
1
3
rsrc2
0
3
rdest
×
×
+
×
×
2
7
2
7
unsigned
unsigned
unsigned
unsigned
signed
signed
signed
signed
signed
SEE ALSO
ifir8ii ufir8uu ifir16
ufir16
ifir8ui