參數(shù)資料
型號： PCA5010H
廠商： NXP Semiconductors N.V.
英文描述： Pager baseband controller
中文描述： 傳呼機基帶控制器
文件頁數(shù)： 44/112頁
文件大小： 627K
代理商： PCA5010H
1998 Nov 02
44
Philips Semiconductors
Product specification
Pager baseband controller
PCA5010
WDCON.2
WDCON.1
WDCON.0
unused
unused
Load watchdog timer with WD0 to WD3
. Control signal from processor.
LD
BIT
SYMBOL
FUNCTION
6.16.3
S
AMPLE SEQUENCE TO RELOAD THE WATCHDOG
The sequence to reload the watchdog with 1 s is:
MOV WDCON, #80H; prepare condition
MOV WDCON, #01H; reload the timer.
6.17
2 or 4-FSK demodulator, filter and clock
recovery circuit
6.17.1
F
UNCTION
The aim of the blocks demodulator and clock recovery
circuitry is to take the signal from the receiver, to format it
into symbols and to transfer it to the processor. The two
blocks use the 76.8 kHz clock.
The demodulator decodes the incoming signal and
generates a sequence of NRZ data. This data is fed to the
clock recovery block which regenerates the
synchronization clock. This clock is used to sample and to
shift the symbols into the register DMD3. Each block is
enabled separately. To save power, the functions should
be disabled whenever not needed.
6.17.1.1
Demodulator and filter
The demodulator can operate both with 2-level or 4-level
FSK input signals (selectable by means of bit LEV).
For both types of input signals the so called demodulator,
filter and direct modes are allowed. The operation mode is
selected on the basis of M bit and BF bit.
In the demodulator mode (M = 0 and BF = X) the I and Q
signals are decoded according to Table 36.
Operating in this mode, an offset compensation can be
performed and the calculated offset value is stored into
register DMD1, in the field AVG. The offset value can be
used by the processor to adjust the analog AFC output
voltage.
The offset coding is given in Table 37.
The performance of the demodulator for the different baud
rates in 2L mode is shown in Fig.24 and for 4L mode in
Fig.25. The graphs show the Bit Error Rate (BER) as a
function of Eb/No (ratio of signal energy per bit to average
noise power per unit bandwidth).
Both the filter and direct modes are intended for
application with an external demodulator. In this case NRZ
data is fed to the I and Q pins. In the 4-FSK case, the MSB
is at pin I and the LSB is at pin Q. In the 2-FSK situation,
only the I pin is used while pin Q must be connected to
V
SS
. In these two modes, the offset calculation and
compensation cannot be performed.
In the filter mode (M = 1 and BF = 0), the data is filtered
and then sent to the clock recovery. The filter
characteristics of the implemented filter are shown in
Fig.26.
In the direct mode (M = 1 and BF = 1), no function of the
demodulator is performed. Consequently there is no
filtering on the data which is sent directly to the clock
recovery.
Table 36
Modulation coding
Table 37
Offset coding (2s complement)
FREQUENCY
(Hz)
2-FSK
4-FSK
D1
D0
D1
D0
+4800
+1600
1600
4800
1
1
0
0
X
X
X
X
1
1
0
0
0
1
1
0
OFFSET (Hz)
9450
9300
...
300
150
0
150
300
...
9300
9450
CODE (AVG6 TO AVG0)
0111111
0111110
...
0000010
0000001
0000000
1111111
1111110
...
1000001
1000000
相關(guān)PDF資料
PDF描述
PCA82C200 STAND-ALONE CAN-CONTROLLER
PCA82C200P STAND-ALONE CAN-CONTROLLER
PCA82C200T STAND-ALONE CAN-CONTROLLER
PCA82C250 CAN controller interface
PCA82C250U CAN controller interface
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCA5010H/XXX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROCONTROLLER|8-BIT|8051 CPU|CMOS|QFP|48PIN|PLASTIC
PCA503HL320 制造商:ADAM-TECH 制造商全稱:Adam Technologies, Inc. 功能描述:ZIF FLEX CIRCUIT CONNECTOR
PCA503HU320 制造商:ADAM-TECH 制造商全稱:Adam Technologies, Inc. 功能描述:ZIF FLEX CIRCUIT CONNECTOR
PCA503V320 制造商:ADAM-TECH 制造商全稱:Adam Technologies, Inc. 功能描述:ZIF FLEX CIRCUIT CONNECTOR
PCA5075 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Power Control/Management
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*