- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382377 > PCA5010H (NXP Semiconductors N.V.) Pager baseband controller PDF資料下載
參數(shù)資料
| 型號： | PCA5010H |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Pager baseband controller |
| 中文描述： | 傳呼機基帶控制器 |
| 文件頁數(shù)： | 20/112頁 |
| 文件大小： | 627K |
| 代理商： | PCA5010H |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁
1998 Nov 02
20
Philips Semiconductors
Product specification
Pager baseband controller
PCA5010
6.8
I
2
C-bus serial I/O
The serial port supports the 2-line I
2
C-bus which consists
of a data line (SDA) and a clock line (SCL). These lines
also function as the I/O port lines P1.7 and P1.6
respectively. The system is unique because data
transport, clock generation, address recognition and bus
control arbitration are all controlled by hardware. The
I
2
C-bus serial I/O has complete autonomy in byte
handling. The implementation in the PCA5010 operates in
single master mode as:
Master transmitter
Master receiver.
These functions are controlled by the S1CON register.
S1STA is the status register whose contents may also be
used as a vector to various service routines. S1DAT is the
data shift register. The block diagram of the I
2
C-bus
serial I/O is shown in Fig.8.
6.8.1
D
IFFERENCES TO A STANDARD
I
2
C-
BUS INTERFACE
The I
2
C-bus interface of the PCA5010 implements the
standard for master receiver and transmitter as defined in
e.g. P83CL781/782 with the following restrictions:
The baud rate is fixed to either 100 kHz (CR0 = 0) or
400 kHz (CR0 = 1) derived from the on-chip 6 MHz
oscillator. Therefore bits CR1 and CR2 in the S1CON
SFR are not available.
Only single master functions are implemented.
– Slave address (S1ADR) is not available
– Status register (S1STA) reports only status defined
for the MST/TRX and MST/REC modes
– Multimaster operation is not supported.
Fig.8 Block diagram of I
2
C-bus serial I/O.
handbook, full pagewidth
MGL449
SHIFT REGISTER
S1DAT
SDA
ARBITRATION LOGIC
SCL
BUS CLOCK GENERATOR
S1STA
I
7
6
5
4
3
2
1
0
S1CON
7
6
5
4
3
2
1
0
相關PDF資料 |
PDF描述 |
|---|---|
| PCA82C200 | STAND-ALONE CAN-CONTROLLER |
| PCA82C200P | STAND-ALONE CAN-CONTROLLER |
| PCA82C200T | STAND-ALONE CAN-CONTROLLER |
| PCA82C250 | CAN controller interface |
| PCA82C250U | CAN controller interface |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PCA5010H/XXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROCONTROLLER|8-BIT|8051 CPU|CMOS|QFP|48PIN|PLASTIC |
| PCA503HL320 | 制造商:ADAM-TECH 制造商全稱:Adam Technologies, Inc. 功能描述:ZIF FLEX CIRCUIT CONNECTOR |
| PCA503HU320 | 制造商:ADAM-TECH 制造商全稱:Adam Technologies, Inc. 功能描述:ZIF FLEX CIRCUIT CONNECTOR |
| PCA503V320 | 制造商:ADAM-TECH 制造商全稱:Adam Technologies, Inc. 功能描述:ZIF FLEX CIRCUIT CONNECTOR |
| PCA5075 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Power Control/Management |
發(fā)布緊急采購，3分鐘左右您將得到回復。