參數(shù)資料
型號(hào)： PCA5010H
廠商： NXP Semiconductors N.V.
英文描述： Pager baseband controller
中文描述： 傳呼機(jī)基帶控制器
文件頁(yè)數(shù)： 105/112頁(yè)
文件大小： 627K
代理商： PCA5010H
1998 Nov 02
105
Philips Semiconductors
Product specification
Pager baseband controller
PCA5010
15.10 Security
To prevent programming or reading of EPROM contents
by third parties security can be set by programming the
security bits. These bits are located outside the normal
memory matrix and have input and output lines separated
from the normal OTP I/Os. Three bits are present, but only
two are actually used. The third bit can be used for future
extensions. Different levels of security can be set by
programming one or more bits. The bits are read in parallel
at every read cycle and interpreted with the following
definition:
Level 0, bits 000, no security, no restrictions
Level 1, bits 001, program disabled
Level 2, bits 011, program and verify disabled.
The third security may be programmed without affecting
the functionality. However only the combinations 000, 001,
011 and 111 are possible.
After reset security Level 1 is loaded. To enable
programming a read or verify (GB pulse not necessary) is
needed to check the actual security level.
The security bits can be programmed the same as normal
bits. The bits have to be supplied to the three least
significant bits of Port 0.
The SEC bit of Port 2 (bit 7) has to be HIGH during the
program cycle. Loading an address is not necessary.
If Port 2.7/SEC is HIGH during verify, the security bits can
be read on the three least significant bits of Port 0. After
programming 011 to the security bits only the security bits
and the signature bytes can be verified and verifying the
normal addresses is not possible any more. Verifying a
normal address while security Level 2 has been
programmed will result in reading 00H.
The programming time for the security bits is 200
μ
s
instead of 100
μ
s for a normal bit. This extra time can be
reached by applying one 200
μ
s program pulse or by
applying two standard pulses.
Although in this OTP an unprogrammed cell is a logic 1
and a programmed cell is a logic 0, a logic 1 has to be
programmed to increase the security level. The inversion
is performed by the interface block.
Since the security is checked at every read or verify
access, verifying is disabled immediately after
programming security Level 2. Programming is disabled if
a verify or a reset is applied after programming security
Level 1 or higher.
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