參數(shù)資料
型號(hào): MT90500
廠商: Mitel Networks Corporation
英文描述: Multi-Channel ATM AAL1 SAR(多通道 ATM AAL1分段及重組設(shè)備(基于通訊總線的系統(tǒng)與ATM網(wǎng)絡(luò)的接口))
中文描述: 多通道自動(dòng)柜員機(jī)AAL1特區(qū)(多通道自動(dòng)柜員機(jī)AAL1分段及重組設(shè)備(基于通訊總線的系統(tǒng)與空中交通管理網(wǎng)絡(luò)的接口))
文件頁數(shù): 75/159頁
文件大?。?/td> 514K
代理商: MT90500
MT90500
75
(MVIP, ST-BUS, SCSA)
SRTSENA
SRTSDATA
CLKx1
FSYNC
PLL
EXTERNAL LOCAL
REFERENCE TIMING
GENERATION
CIRCUIT (Small FPGA)
ATM PHY
DEVICE
Network Reference Clock
UTOPIA interface
EX_8KA
.
Figure 35 - Clock Recovery Using SRTS Method (Hardware)
PLLCLK
REF8KCLK
Note 1:
In ATM receive applications, SRTSDATA corresponds to the 4-bit SRTS calculated
as the difference between the locally-generated RTS code and the remotely-generated RTS
code received from the incoming ATM cell stream.
Note 2:
The external timing generation logic generates an 8 kHz output reference clock. This
signal is fed from the FPGA into the EX_8KA input of the MT90500 to be routed back to the
external PLL.
Note 3:
The external reference timing generation logic can be implemented in a small FPGA.
FNXI
TDM Port
CORSIGC
CORSIGD
CORSIGB
Divide by x
e.g. MT9041
MT90500
DEVICE
相關(guān)PDF資料
PDF描述
MT90500 Multi-Channel ATM AAL1 SAR
MT90500AL Multi-Channel ATM AAL1 SAR
MT90502 Multi-Channel AAL2 SAR(多通道 ATM AAL2分段及重組設(shè)備(基于通訊總線的系統(tǒng)與ATM網(wǎng)絡(luò)的接口))
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90500AL 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Multi-Channel ATM AAL1 SAR
MT90500AL-ENG1 制造商:Mitel Networks Corporation 功能描述:
MT90502 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR
MT90502_06 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR
MT90502AG 制造商:Rochester Electronics LLC 功能描述: 制造商:Zarlink Semiconductor Inc 功能描述: