參數(shù)資料
型號： MT90500
廠商： Mitel Networks Corporation
英文描述： Multi-Channel ATM AAL1 SAR(多通道 ATM AAL1分段及重組設(shè)備（基于通訊總線的系統(tǒng)與ATM網(wǎng)絡(luò)的接口）)
中文描述： 多通道自動柜員機(jī)AAL1特區(qū)（多通道自動柜員機(jī)AAL1分段及重組設(shè)備（基于通訊總線的系統(tǒng)與空中交通管理網(wǎng)絡(luò)的接口））
文件頁數(shù)： 103/159頁
文件大?。?/td> 514K
代理商： MT90500
MT90500
103
Table 53 - Local Bus to TDM Bus Transfer Register
Address: 6024 (Hex)
Label: LOCTDM
Reset Value: 0000 (Hex)
Label
Bit Position
Type
Description
LOC2TDMTS
6:0
R/W
LOCSTi TDM Time Slot. Output TDM time slot on which LOCSTi time slot 0 will be
transmitted.
Reserved
7
R/W
Reserved. Should be written as ‘0’.
LOCSTiNUM
14:8
R/W
LOCSTi Number of Time Slots. Number of time slots that are passed to the TDM bus from
the local bus.
“0000000” = 1 channel;
“0011111” = 32 channels.
RENA
15
R/W
Receive Enable. When '1', the transfer process is enabled and from 1 to 32 local bus time
slots will replace the TDM data coming from the RX_SAR.
Note:
the TIENE bit at register 6000h must be set to ‘1’ (TDM to/from Internal Memory
transfer enabled) for the Local Bus to/from TDM Bus transfer to operate.
Note:
The Output Enable Registers must be enabled to permit these data bytes to be
transferred out on the TDM bus.
Table 54 - TX Circular Buffer Control Structure Base Register
Address: 6040 (Hex)
Label: TXCBCS
Reset Value: 0000 (Hex)
Label
Bit Position
Type
Description
TXCBCSL
3:0
R/W
TX Circular Buffer Control Structure Length.
“0000” = 128 entries;
“0001” = 256 entries;
“0010” = 512 entries;
“0011” = 1024 entries;
“0100” = 2048 entries;
other = reserved.
TXCBCSBASE
15:4
R/W
TX Circular Buffer Control Structure Base Address. This field represents bits<20:9> of the
base address of the TX Circular Buffer Control Structure. The table that this structure
points to must not cross an 8 Kbyte boundary.
Refer to Figure 5 on page 34 for implementation details.
Table 55 - External to Internal Memory Control Structure Base Register
Address: 6042 (Hex)
Label: EMIM
Reset Value: 0000 (Hex)
Label
Bit Position
Type
Description
EIMCSL
3:0
R/W
External to Internal Memory Control Structure Length.
“0000” = 128 entries;
“0001” = 256 entries;
“0010” = 512 entries;
“0011” = 1024 entries;
“0100” = 2048 entries;
other = reserved.
EIMCSBASE
15:4
R/W
External to Internal Memory Control Structure Base Address. This field represents
bits<20:9> of the base address of the External to Internal Memory Control Structure. The
table that this structure points to must not cross an 8 Kbyte boundary.
Refer to Figure 7 on page 37 for implementation details.
相關(guān)PDF資料
PDF描述
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MT90502 Multi-Channel AAL2 SAR(多通道 ATM AAL2分段及重組設(shè)備（基于通訊總線的系統(tǒng)與ATM網(wǎng)絡(luò)的接口）)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT90500AL 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Multi-Channel ATM AAL1 SAR
MT90500AL-ENG1 制造商:Mitel Networks Corporation 功能描述:
MT90502 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR
MT90502_06 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Multi-Channel AAL2 SAR
MT90502AG 制造商:Rochester Electronics LLC 功能描述: 制造商:Zarlink Semiconductor Inc 功能描述:
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