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參數(shù)資料
| 型號： | MT57W4MH9CF-6 |
| 元件分類： | SRAM |
| 英文描述： | 4M X 9 DDR SRAM, 0.5 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1 MM PITCH, FBGA-165 |
| 文件頁數(shù)： | 12/29頁 |
| 文件大?。?/td> | 344K |
| 代理商： | MT57W4MH9CF-6 |
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4 MEG x 8, 4 MEG x 9, 2 MEG x 18, 1 MEG x 36
1.8V VDD, HSTL, DDR SIO SRAM
ADVANCE
36Mb: 1.8V VDD, HSTL, QDRB2 SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT57W2MH18C_B.fm – Rev. B, Pub. 2/03
2
2003 Micron Technology, Inc.
Depth expansion is accomplished with a single
device select (LD#), which is received at K rising edge.
All synchronous inputs pass through registers con-
trolled by the K or K# input clock rising edges. Active
low byte writes (BWx#) permit byte or nibble write
selection. Write data and byte writes are registered on
the rising edges of both K and K#. The addressing
within each burst of two is fixed and sequential, begin-
ning with the lowest address and ending with the high-
est address. All synchronous data outputs pass
through output registers controlled by the rising edges
of the output clocks (C and C# if provided, otherwise K
and K#).
Four balls are used to implement JTAG test capabili-
ties: test mode select (TMS), test data-in (TDI), test
clock (TCK), and test data-out (TDO). JTAG circuitry is
used to serially shift data to and from the SRAM. JTAG
inputs use JEDEC-standard 1.8V I/O levels to shift data
during this testing mode of operation.
The SRAM operates from a 1.8V power supply, and
all inputs and outputs are HSTL-compatible. The
device is ideally suited for applications that require a
new transaction to be initiated each clock cycle.
Please refer to Micron’s Web site (www.micron.com/
sramds) for the latest data sheet.
READ/WRITE Operations
All bus transactions operate on an uninterruptable
burst of two data, requiring one full clock cycle of bus
utilization. Any transaction type can be initiated at K
rising edge independent of the previous transaction
type. This permits any random operation without ever
needing bus turnaround delays.
READ cycles are pipelined. The request is initiated
by driving R/W# HIGH and providing the address at K
rising edge. Data is delivered after the rising edge of K#
(t + 1) using C and C# as the output timing references
or using K and K# if C and C# are tied HIGH. If C and
C# are tied HIGH, they may not be toggled during
device operation. Output tri-stating is automatically
controlled such that the bus is released if no data is
being delivered. This permits banked SRAM systems
with no complex OE timing generation. Back-to-back
READ cycles can be initiated every K rising edge.
WRITE cycles are initiated by driving R/W# LOW
and provide the address at K rising edge. Data is
expected at the rising edge of K and K#, beginning at
the next K rising edge after the cycle is initiated. Write
registers are incorporated to facilitate pipelined self-
timed WRITE cycles and to provide fully coherent data
for all combinations of reads and writes. A read can
immediately follow a write even if they are to the same
address. Although the write data has not been written
to the memory array, the SRAM will deliver the data
from the write register instead of using the older data
from the memory array. The latest data is always uti-
lized for all bus transactions. WRITE cycles can be ini-
tiated on every K rising edge.
Partial WRITE Operations
BYTE WRITE operations are supported, except for
x8 devices in which nibble write is supported. The
active LOW write controls, BWx# (NWx#), are regis-
tered coincident with their corresponding data. This
feature can eliminate the need for some READ-MOD-
IFY-WRITE cycles, collapsing it to a single BYTE/NIB-
BLE WRITE operation in some instances.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT57W512H36BF-7.5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
| MT57W512H36JF-4 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
| MT57W512H36JF-5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
| MT57W512H36JF-6 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Micron Technology Inc 功能描述: |
| MT57W512H36JF-7.5 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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