
134
ATtiny40 [DATASHEET]
8263B–AVR–01/2013
If TWAE is set to one, TWSAM can be loaded with a second slave address in addition to the TWSA register. In this
mode, the slave will match on 2 unique addresses, one in TWSA and the other in TWSAM.
Bit 0 – TWAE: TWI Address Enable
By default, this bit is zero and the TWSAM bits acts as an address mask to the TWSA register. If this bit is set to
one, the slave address match logic responds to the two unique addresses in TWSA and TWSAM.
18. Programming Interface
18.1
Features
Physical Layer:
– Synchronous Data Transfer
– Bi-directional, Half-duplex Receiver And Transmitter
– Fixed Frame Format With One Start Bit, 8 Data Bits, One Parity Bit And 2 Stop Bits
– Parity Error Detection, Frame Error Detection And Break Character Detection
– Parity Generation And Collision Detection
– Automatic Guard Time Insertion Between Data Reception And Transmission
Access Layer:
– Communication Based On Messages
– Automatic Exception Handling Mechanism
– Compact Instruction Set
– NVM Programming Access Control
– Tiny Programming Interface Control And Status Space Access Control
– Data Space Access Control
18.2
Overview
The Tiny Programming Interface (TPI) supports external programming of all Non-Volatile Memories (NVM). Mem-
ory programming is done via the NVM Controller, by executing NVM controller commands as described in
“MemoryThe Tiny Programming Interface (TPI) provides access to the programming facilities. The interface consists of two
layers: the access layer and the physical layer. The layers are illustrated in
Figure 18-1.Figure 18-1. The Tiny Programming Interface and Related Internal Interfaces
Programming is done via the physical interface. This is a 3-pin interface, which uses the RESET pin as enable, the
TPICLK pin as the clock input, and the TPIDATA pin as data input and output.
NVM can be programmed at 5V, only.
ACCESS
LAYER
PHYSICAL
LAYER
NVM
CONTROLLER
NON-VOLATILE
MEMORIES
TPICLK
RESET
TPIDATA
TINY PROGRAMMING INTERFACE (TPI)
DATA BUS