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ATtiny40 [DATASHEET]
8263B–AVR–01/2013
INT0: The PC2 pin can serve as an External Interrupt source 0.
CLKO: The divided system clock can be output on the PB5 pin, if the CKOUT Fuse is programmed, regardless
of the PORTB5 and DDB5 settings. It will also be output during reset.
MISO: SPI Master Input / Slave Output. Regardless of DDC2, this pin is automatically configured as an input
when SPI is enabled as a master. The data direction of this pin is controlled by DDC2 when SPI is enabled as a
slave.
PCINT14: Pin Change Interrupt source 14. The PC2 pin can serve as an external interrupt source for pin
change interrupt 2.
Port C, Bit 3 – RESET/PCINT15
RESET: External Reset input is active low and enabled by unprogramming (“1”) the RSTDISBL Fuse. Pullup is
activated and output driver and digital input are deactivated when the pin is used as the RESET pin.
PCINT15: Pin Change Interrupt source 15. The PC3 pin can serve as an external interrupt source for pin
change interrupt 2.
Port C, Bit 4 – MOSI/SDA/TPIDATA/PCINT16
MOSI: SPI Master Output / Slave Input. Regardless of DDC4, this pin is automatically configured as an input
when SPI is enabled as a slave. The data direction of this pin is controlled by DDC4 when SPI is enabled as a
master.
SDA: TWI Data. The pin is disconnected from the port and becomes the serial data for the TWI when TWEN in
TWSCRA is set. In this mode of operation, the pin is driven by an open drain driver with slew rate limitation and
a spike filter.
TPIDATA: Serial Programming Data.
PCINT16: Pin Change Interrupt source 16. The PC4 pin can serve as an external interrupt source for pin
change interrupt 2.
Port C, Bit 5 – CLKI/PCINT17
TPICLK: Serial Programming Clock.
PCINT17: Pin Change Interrupt source 17. The PC5 pin can serve as an external interrupt source for pin
change interrupt 2.