
74
ATtiny40 [DATASHEET]
8263B–AVR–01/2013
Note:
1. MAX
= 0xFF
BOTTOM = 0x00
11.9.2
TCCR0B – Timer/Counter Control Register B
Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when TCCR0B is written when
operating in PWM mode. When writing a logical one to the FOC0A bit, an immediate Compare Match is forced on
the Waveform Generation unit. The OC0A output is changed according to its COM0A[1:0] bits setting. Note that
the FOC0A bit is implemented as a strobe. Therefore it is the value present in the COM0A[1:0] bits that determines
the effect of the forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using OCR0A as TOP.
The FOC0A bit always reads as zero.
Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when TCCR0B is written when
operating in PWM mode. When writing a logical one to the FOC0B bit, an immediate Compare Match is forced on
the Waveform Generation unit. The OC0B output is changed according to its COM0B[1:0] bits setting. Note that
the FOC0B bit is implemented as a strobe. Therefore it is the value present in the COM0B[1:0] bits that determines
the effect of the forced compare.
A FOC0B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using OCR0B as TOP.
The FOC0B bit always reads as zero.
Bit 3 – WGM02: Waveform Generation Mode
Bits 2:0 – CS0[2:0]: Clock Select
5
101
PWM, Phase
Correct
OCRA
TOP
BOTTOM
6
110
Reserved
–
7
111
Fast PWM
OCRA
BOTTOM
TOP
Table 11-8.
Waveform Generation Mode Bit Description (Continued)
Mode
WGM02
WGM01
WGM00
Timer/Counter
Mode of Operation
TOP
Update of
OCRx at
TOV Flag
Set on
(1)
Bit
7
6
5
4
3
2
1
0
FOC0A
FOC0B
TSM
PSR
WGM02
CS02
CS01
CS00
TCCR0B
Read/Write
W
R/W
Initial Value
0