- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45387 > MQ83C154XXX-16/883D (TEMIC SEMICONDUCTORS) 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44 PDF資料下載
參數(shù)資料
| 型號： | MQ83C154XXX-16/883D |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44 |
| 文件頁數(shù)： | 186/204頁 |
| 文件大?。?/td> | 5687K |
| 代理商： | MQ83C154XXX-16/883D |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁當(dāng)前第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁
82
ATtiny40 [DATASHEET]
8263B–AVR–01/2013
OCR1A. The OCR1A defines the top value for the counter, hence also its resolution. This mode allows greater con-
trol of the Compare Match output frequency. It also simplifies the operation of counting external events.
The timing diagram for the CTC mode is shown in Figure 12-4. The counter value (TCNT1) increases until a Com-
pare Match occurs between TCNT1 and OCR1A, and then counter (TCNT1) is cleared.
Figure 12-4. CTC Mode, Timing Diagram
An interrupt can be generated each time the counter value reaches the TOP value by using the OCF1A Flag. If the
interrupt is enabled, the interrupt handler routine can be used for updating the TOP value. However, changing TOP
to a value close to BOTTOM when the counter is running with none or a low prescaler value must be done with
care since the CTC mode does not have the double buffering feature. If the new value written to OCR1A is lower
than the current value of TCNT1, the counter will miss the Compare Match. The counter will then have to count to
its maximum value (0xFF) and wrap around starting at 0x00 before the Compare Match can occur. As for the Nor-
mal mode of operation, the TOV1 Flag is set in the same timer clock cycle that the counter counts from MAX to
0x00.
12.7.3
Normal, 16-bit Mode
In 16-bit mode, see Table 12-3 on page 81, the counter (TCNT1H/L) is a incrementing until it overruns when it
passes its maximum 16-bit value (MAX = 0xFFFF) and then restarts from the bottom (0x0000). The Overflow Flag
(TOV1) will be set in the same timer clock cycle as the TCNT1H/L becomes zero. The TOV1 Flag in this case
behaves like a 17th bit, except that it is only set, not cleared. However, combined with the timer overflow interrupt
that automatically clears the TOV1 Flag, the timer resolution can be increased by software. There are no special
cases to consider in the Normal mode, a new counter value can be written anytime. The Output Compare Unit can
be used to generate interrupts at some given time.
12.7.4
8-bit Input Capture Mode
The Timer/Counter1 can also be used in an 8-bit Input Capture mode, see Table 12-3 on page 81 for bit settings.
For full description, see the section “Input Capture Unit” on page 79.
12.7.5
16-bit Input Capture Mode
The Timer/Counter1 can also be used in a 16-bit Input Capture mode, see Table 12-3 on page 81 for bit settings.
For full description, see the section “Input Capture Unit” on page 79.
12.8
Timer/Counter Timing Diagrams
The Timer/Counter is a synchronous design and the timer clock (clk
T1) is therefore shown as a clock enable signal
in the following figures. The figures include information on when Interrupt Flags are set. Figure 12-5 contains timing
data for basic Timer/Counter operation. The figure shows the count sequence close to the MAX value.
TCNTn
OCnA
(Toggle)
OCnx Interrupt Flag Set
1
4
Period
2
3
(COMnA[1:0] = 1)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MR87C251SB16 | 8-BIT, UVPROM, 16 MHz, MICROCONTROLLER, CQCC44 |
| MC87C251SB16 | 8-BIT, UVPROM, 16 MHz, MICROCONTROLLER, CDIP40 |
| MR87C51FC | 8-BIT, UVPROM, MICROCONTROLLER, CQCC44 |
| MD87C51FC-16 | 8-BIT, UVPROM, 16 MHz, MICROCONTROLLER, CDIP40 |
| MT80C51T-36R | 8-BIT, MROM, 36 MHz, MICROCONTROLLER, PQFP44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MQ86 | 制造商:TE Connectivity 功能描述: |
| MQ8797BH | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Intel 功能描述: |
| MQ87C196KC/R | 制造商:Rochester Electronics LLC 功能描述: |
| MQ87C196KD-16/B | 制造商:Rochester Electronics LLC 功能描述: |
| MQ87C196KD-20/R | 制造商:Rochester Electronics LLC 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。