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參數(shù)資料
| 型號(hào)： | MQ83C154XXX-16/883D |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, CQFP44 |
| 文件頁(yè)數(shù)： | 121/204頁(yè) |
| 文件大?。?/td> | 5687K |
| 代理商： | MQ83C154XXX-16/883D |
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23
ATtiny40 [DATASHEET]
8263B–AVR–01/2013
6.5.3
OSCCAL – Oscillator Calibration Register
.
Bits 7:0 – CAL[7:0]: Oscillator Calibration Value
The oscillator calibration register is used to trim the calibrated internal oscillator and remove process variations
from the oscillator frequency. A pre-programmed calibration value is automatically written to this register during
chip reset, giving the factory calibrated frequency as specified in Table 20-2, “Calibration Accuracy of Internal RC
The application software can write this register to change the oscillator frequency. The oscillator can be calibrated
to frequencies as specified in Table 20-2, “Calibration Accuracy of Internal RC Oscillator,” on page 154. Calibration
outside the range given is not guaranteed.
The CAL[7:0] bits are used to tune the frequency of the oscillator. A setting of 0x00 gives the lowest frequency, and
a setting of 0xFF gives the highest frequency.
7.
Power Management and Sleep Modes
The high performance and industry leading code efficiency makes the AVR microcontrollers an ideal choise for low
power applications. In addition, sleep modes enable the application to shut down unused modules in the MCU,
thereby saving power. The AVR provides various sleep modes allowing the user to tailor the power consumption to
the application’s requirements.
7.1
Sleep Modes
Figure 6-1 on page 18 presents the different clock systems and their distribution in ATtiny40. The figure is helpful in
selecting an appropriate sleep mode. Table 7-1 shows the different sleep modes and their wake up sources.
Notes:
1. For INT0, only level interrupt.
2. Only TWI address match interrupt.
To enter any of the four sleep modes, the SE bits in MCUCR must be written to logic one and a SLEEP instruction
must be executed. The SM[2:0] bits in the MCUCR register select which sleep mode (Idle, ADC Noise Reduction,
Standby or Power-down) will be activated by the SLEEP instruction. See Table 7-2 for a summary.
Bit
765
432
1
0
CAL7
CAL6
CAL5
CAL4
CAL3
CAL2
CAL1
CAL0
OSCCAL
Read/Write
R/W
Initial Value
0
Table 7-1.
Active Clock Domains and Wake-up Sources in Different Sleep Modes.
Sleep Mode
Active Clock Domains
Oscillators
Wake-up Sources
cl
k
CP
U
cl
k
NV
M
cl
k
IO
cl
k
AD
C
Ma
in
Clo
c
k
So
urce
Enab
led
INT0
and
Pi
n
Chan
ge
W
a
tchdo
g
In
terr
u
p
t
TW
ISla
v
e
AD
C
Other
I/O
Idle
X
XXXX
ADC Noise Reduction
X
X(1)
X
Standby
X
X(1)
Power-down
X(1)
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