
Communication Processor Module
16-460
MPC823 USER’S MANUAL
MOTOROLA
I 2
C
COMMUNICATION
16
PROCESSOR
MODULE
E—Empty
0 = The data buffer associated with this RX buffer descriptor is filled with received data
or data reception is aborted due to an error condition. The core is free to examine
or write to any fields of this RX buffer descriptor. The communication processor
module does not use this buffer descriptor as long as the E bit is zero.
1 = The data buffer associated with this buffer descriptor is empty or reception is
currently in progress. This RX buffer descriptor and its associated receive buffer
are owned by the communication processor module. Once the E bit is set, the core
should not write any fields of this RX buffer descriptor.
Bits 1, 5–13, and 15—Reserved
These bits are reserved and should be set to 0.
W—Wrap (Final Buffer Descriptor in Table)
0 = This is not the last buffer descriptor in the RX buffer descriptor table.
1 = This is the last buffer descriptor in the RX buffer descriptor table. After this buffer
is used, the communication processor module receives incoming data into the first
buffer descriptor that RBASE points to in the table. The number of RX buffer
descriptors in this table is programmable and determined only by the W bit and
overall space constraints of the dual-port RAM.
I—Interrupt
0 = No interrupt is generated after this buffer is filled.
1 = The RXB bit in the I2CE register is set when this buffer is completely filled by the
communication processor module, indicating the need for the core to process the
buffer. The RXB bit can cause an interrupt if it is enabled.
L—Last
The I2C controller sets this bit when the buffer is closed because a stop (or start) condition
occurred on the bus or as a result of an overrun. The I2C controller writes this bit after the
received data is placed into the associated data buffer.
0 = This buffer does not contain the last character of the message.
1 = This buffer contains the last character of the message.
OV—Overrun
This bit indicates that a receiver overrun has occurred during reception. The I2C controller
writes this bit after the received data is placed into the associated data buffer.