
Communication Processor Module
16-198
MPC823 USER’S MANUAL
MOTOROLA
SCC2
COMMUNICATION
16
PROCESSOR
MODULE
The UART transmit shift register transmits the outgoing data on the TXD2 pin. Data is then
clocked synchronously with the transmit clock, which can have an internal or external
source. The RFW bit in the GSMR_H must be set for an 8-bit receive FIFO.
16.9.15.4 SCC2 UART PARAMETER RAM MEMORY MAP. When configured to operate
in UART mode, the serial communication controller overlays the structure used in
Table 16-26. SCC2 UART Parameter RAM Memory Map
ADDRESS
NAME
WIDTH
DESCRIPTION
SCC2 Base + 30
RES
Word
Reserved
SCC2 Base + 34
RES
Word
Reserved
SCC2 Base + 38
MAX_IDL
Half-word
MaximumIdle Characters
SCC2 Base + 3A
IDLC
Half-word
Temporary idle Counter
SCC2 Base + 3C
BRKCR
Half-word
Break Count Register (Transmit)
SCC2 Base + 3E
PAREC
Half-word
Receive Parity Error Counter
SCC2 Base + 40
FRMEC
Half-word
Receive Framing Error Counter
SCC2 Base + 42
NOSEC
Half-word
Receive Noise Counter
SCC2 Base + 44
BRKEC
Half-word
Receive Break Condition Counter
SCC2 Base + 46
BRKLN
Half-word
Last Received Break Length
SCC2 Base + 48
UADDR1
Half-word
UART Address Character 1
SCC2 Base + 4A
UADDR2
Half-word
UART Address Character 2
SCC2 Base + 4C
RTEMP
Half-word
Temp Storage
SCC2 Base + 4E
TOSEQ
Half-word
Transmit Out-of-Sequence Character
SCC2 Base + 50
CHARACTER1
Half-word
Control Character 1
SCC2 Base + 52
CHARACTER2
Half-word
Control Character 2
SCC2 Base + 54
CHARACTER3
Half-word
Control Character 3
SCC2 Base + 56
CHARACTER4
Half-word
Control Character 4
SCC2 Base + 58
CHARACTER5
Half-word
Control Character 5
SCC2 Base + 5A
CHARACTER6
Half-word
Control Character 6
SCC2 Base + 5C
CHARACTER7
Half-word
Control Character 7
SCC2 Base + 5E
CHARACTER8
Half-word
Control Character 8
SCC2 Base + 60
RCCM
Half-word
Receive Control Character Mask
SCC2 Base + 62
RCCRP
Half-word
Receive Control Character Register
SCC2 Base + 64
RLBC
Half-word
Receive Last Break Character
NOTE: You are only responsible for initializing the items in bold.
SCC2 base = (IMMR & 0xFFFF0000) + 0x3D00.
All references to registers in the parameter RAM table are actually implemented in the dual-port
RAM area as a memory-based register.