
Communication Processor Module
MOTOROLA
MPC823 USER’S MANUAL
16-137
SERIAL
I/F
COMMUNICATION
16
PROCESSOR
MODULE
16.7.5.5 SERIAL INTERFACE STATUS REGISTER. The 8-bit serial interface status
register (SISTR) lets you know which part of the serial interface RAM is the current-route
RAM. The value of this register is only valid when the corresponding bit in the SICMR is
cleared.
CRORA—Current Route of TDMA Receiver
0 = The current-route receiver RAM is in address 0–63 when the serial interface
supports the TDM (RDM field in the SIGMR = 01).
1 = The current-route receiver RAM is in address 64–127 when the serial interface
supports the TDM (RDM = 01).
CROTA—Current Route of TDMA Transmitter
0 = The current-route transmitter RAM is in address 128–191 when the serial interface
supports the TDM (RDM field in the SIGMR = 01).
1 = The current-route transmitter RAM is in address 192–255 when the serial interface
supports the TDM (RDM = 01).
Bits 2–7—Reserved
These bits are reserved and should be set to 0.
16.7.5.6 SERIAL INTERFACE RAM POINTER REGISTER. The 32-bit, read-only serial
interface RAM pointer (SIRP) register lets you know which RAM entry is currently being
serviced. It gives you a real-time status location of the serial interface that is currently inside
the TDM frame. Although not everyone needs to access the SIRP register, it does provide
information that might be helpful for debugging and for synchronizing system activity with
TDM activity. Usually, reading the SISTR is sufficient for most applications.
You can determine which RAM entry in the serial interface RAM is currently in progress, but
you cannot determine the status within that entry. If the RAM entry is programmed to select
four contiguous time-slots from the TDM and the SIRP register indicates the entry is
currently active, you will not know which of the four time-slots is currently in progress. The
SIRP register does, however, change its status as soon as the next serial interface RAM
entry begins processing.
SISTR
BIT
0
1
2
3
4
5
6
7
FIELD
CRORA
CROTA
RESERVED
RESET
00
0
R/W
RR
R
ADDR
(IMMR & 0xFFFF0000) + 0xAE6
Note:
You can externally connect one of the eight strobes to an interrupt pin to
generate an interrupt on a particular serial interface RAM entry.