
Communication Processor Module
16-406
MPC823 USER’S MANUAL
MOTOROLA
SMC
COMMUNICATION
16
PROCESSOR
MODULE
16.11.7.8 SMC TRANSPARENT CONTROLLER ERRORS. The serial management
controllers report message reception and transmission error conditions using the channel
buffer descriptors and the SMCE–Transparent register. The following transmission errors
can be detected by the SMC Transparent controller.
Underrun Error—When this error occurs, the channel stops transmitting the buffer,
closes it, sets the UN bit in the buffer descriptor, and generates the TXE interrupt if it is
enabled. The channel resumes transmission after it receives the RESTART
TRANSMIT command. Underrun cannot occur between frames.
Overrun Error—A serial management controller maintains an internal FIFO for
receiving data. The communication processor module begins programming the SDMA
channel if the data buffer is in external memory when the first character is received into
the FIFO. If a FIFO overrun occurs, a serial management controller writes the received
data character to the internal FIFO over the previously received character. The previous
character and its status bits are lost. Then the channel closes the buffer, sets the OV
bit in the buffer descriptor, and generates the RX interrupt if it is enabled. Reception
then continues as normal.
16.11.7.9 SMC TRANSPARENT MODE REGISTER. When the SMC is in transparent
mode, the 16-bit, memory-mapped, read/write SMC mode register is referred to as the SMC
transparent mode register (SMCMR–Transparent). The function of bits 8-15 is common to
each SMC protocol, but bits 0-7 vary according to the protocol selected by the SM bits of
this register.
Bits 0, 5, and 8–9—Reserved
These bits are reserved and should be set to 0.
CLEN—Character Length
This field is programmed with a value between 3 and 15 to obtain 4 to 16 bits per character.
If the character length is less than 8 bits, the MSBs of the byte in buffer memory are not used
on transmit and are written with zeros on receive. On the other hand, if the character length
is more than 8 bits but less than 16 bits, the MSBs of the half-word in buffer memory are not
used on transmit and are written with zeros on receive.
SMCMR–TRANSPARENT
BIT
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
FIELD
RES
CLEN
RES
BS
REVD
RESERVED
SM
DM
TEN
REN
RESET
0
000
0
00
R/W
R/W
ADDR
(IMMR & 0xFFFF0000) + 0xA82 (SMC1), 0xA92 (SMC2)