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Communication Processor Module
MOTOROLA
MPC823 USER’S MANUAL
16-319
SCC2
COMMUNICATION
16
PROCESSOR
MODULE
SCC2 Base + 56
MAX_B
Half-word
Max BD Byte Count
SCC2 Base + 58
GADDR1
Half-word
Group Address Filter 1
SCC2 Base + 5A
GADDR2
Half-word
Group Address Filter 2
SCC2 Base + 5C
GADDR3
Half-word
Group Address Filter 3
SCC2 Base + 5E
GADDR4
Half-word
Group Address Filter 4
SCC2 Base + 60
TBUF0_DATA0
Word
Save Area 0–Current Frame
SCC2 Base + 64
TBUF0_DATA1
Word
Save Area 1–Current Frame
SCC2 Base + 68
TBUF0_RBA0
Word
Save RBA–Current Frame
SCC2 Base + 6C
TBUF0_CRC
Word
Save CRC–Current Frame
SCC2 Base + 70
TBUF0_BCNT
Half-word
Save BCNT–Current Frame
SCC2 Base + 72
PADDR1_L*
Half-word
Physical Address 1 (LSB)
SCC2 Base + 74
PADDR1_M*
Half-word
Physical Address 1
SCC2 Base + 76
PADDR1_H*
Half-word
Physical Address 1 (MSB)
SCC2 Base + 78
P_PER
Half-word
Persistence
SCC2 Base + 7A
RFBD_PTR
Half-word
RX First BD Pointer
SCC2 Base + 7C
TFBD_PTR
Half-word
TX First BD Pointer
SCC2 Base + 7E
TLBD_PTR
Half-word
TX Last BD Pointer
SCC2 Base + 80
TBUF1_DATA0
Word
Save Area 0–Next Frame
SCC2 Base + 84
TBUF1_DATA1
Word
Save Area 1–Next Frame
SCC2 Base + 88
TBUF1_RBA0
Word
Save RBA–Next Frame
SCC2 Base + 8C
TBUF1_CRC
Word
Save CRC–Next Frame
SCC2 Base + 90
TBUF1_BCNT
Half-word
Save BCNT–Next Frame
SCC2 Base + 92
TX_LEN
Half-word
TX Frame Length Counter
SCC2 Base + 94
IADDR1
Half-word
Individual Address Filter 1
SCC2 Base + 96
IADDR2
Half-word
Individual Address Filter 2
SCC2 Base + 98
IADDR3
Half-word
Individual Address Filter 3
SCC2 Base + 9A
IADDR4
Half-word
Individual Address Filter 4
SCC2 Base + 9C
BOFF_CNT
Half-word
Backoff Counter
SCC2 Base + 9E
TADDR_L
Half-word
Temp Address (LSB)
SCC2 Base + A0
TADDR_M
Half-word
Temp Address
SCC2 Base + A2
TADDR_H
Half-word
Temp Address (MSB)
NOTE:
You are only responsible for initializing the items in bold. SCC2 Base = (IMMR & 0xFFFF0000) + 0x3D00.
* The bytes inside each half-word are reversed.
All references to registers in the parameter RAM table are actually implemented in the dual-port RAM area as a memory-based
register.
Table 16-30. SCC2 Ethernet Parameter RAM Memory Map (Continued)
ADDRESS
NAME
WIDTH
DESCRIPTION