
169
42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
This register contains the second least significant byte of the 32 bit compare value for
the third compare unit
Bit 7:0 – SCOCR3LH7:0 - Symbol Counter Output Compare Register 3 LH-Byte
10.11.33 SCOCR3LL – Symbol Counter Output Compare Register 3 LL-Byte
Bit
7
6
5
4
3
2
1
0
NA ($ED)
SCOCR3LL7:0
SCOCR3LL
Read/Write
RW
Initial Value
0
This register contains the least significant byte of the 32 bit compare value for the third
compare unit
Bit 7:0 – SCOCR3LL7:0 - Symbol Counter Output Compare Register 3 LL-Byte
10.11.34 SCCR0 – Symbol Counter Control Register 0
Bit
7
6
5
4
3
2
1
0
NA ($DC)
SCRES
SCMBTS
SCEN
SCCKSEL
SCTSE
SCCMP3 SCCMP2 SCCMP1
SCCR0
Read/Write
RW
Initial Value
0
The Control Register 0 is used to setup the operating mode of the symbol counter and
the compare units
Bit 7 – SCRES - Symbol Counter Synchronization
If this bit is set to 1, the 16 MHz clock prescaler as well as the backoff slot counter is
cleared. This function can be used to align the symbol timing within one 16 s symbol
period and to restart the backoff slot counter with a complete 320 s period. This
feature works only if the symbol counter module operates with the 16 MHz clock from
XTAL1. After switching to RTC clock source, the symbol period synchronization is lost.
This bit is cleared automatically.
Bit 6 – SCMBTS - Manual Beacon Timestamp
With this bit a manual beacon timestamp can be generated. If set to 1, the current
symbol counter value is stored into the beacon timestamp register. The bit is cleared
afterwards. The manual beacon timestamping can be used in conjunction with the
relative compare mode of the three compare units to generate compare match
interrupts without having a beacon frame received.
Bit 5 – SCEN - Symbol Counter enable
This bit activates the symbol counter module. If the bit is not set, the counter, backoff
slot counter and the compare unit are disabled and disconnected from the clock. In this
way the power consumption can be reduced. All registers can be accessed, but write
access to the counter register SCCNT is not possible.
Bit 4 – SCCKSEL - Symbol Counter Clock Source select
With this bit the clock source for the symbol counter can be selected. If the bit is one,
the RTC clock from TOSC1 is selected, otherwise the symbol counter operates with the
clock from XTAL1. During transceiver sleep modes the clock falls back to the RTC clock