
339
42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
21 8-bit Timer/Counter2 with PWM and Asynchronous Operation
21.1 Features
Timer/Counter2 is a general purpose, single channel, 8-bit Timer/Counter module. The
main features are:
Single channel counter
Clear timer on compare match (auto reload)
Glitch-free, phase-correct pulse-width modulator (PWM)
Frequency generator
10 bit clock prescaler
Overflow and compare match interrupt sources (TOV2, OCF2A and OCF2B)
Able to run with external 32 kHz watch crystal independent of the I/O clock
21.2 Overview
CPU accessible I/O Registers, including I/O bits and I/O pins, are shown in bold. The
The Power Reduction Timer/Counter2 bit PRTIM2 in register PRR0 (see
"PRR0 –Timer/Counter2 module.
Note: OC2B is implemented but not routed to a pin and for this reason it can’t be used.
21.2.1 Registers
The Timer/Counter (TCNT2) and Output Compare Register (OCR2A and OCR2B) are 8
bit registers. Interrupt request (abbreviated to Int.Req.) signals are all visible in the
Timer Interrupt Flag Register (TIFR2). All interrupts are individually masked with the
Timer Interrupt Mask Register (TIMSK2). TIFR2 and TIMSK2 are not shown in the
figure.
The Timer/Counter can be clocked internally, via the prescaler, asynchronously clocked
from the TOSC1/2 pins or alternatively from the Automated Meter Reading (AMR) pin
as detailed later in this section. The asynchronous operation is controlled by the
Asynchronous Status Register (ASSR). The Clock Select logic block controls which
clock source the Timer/Counter uses to increment (or decrement) its value. The
Timer/Counter is inactive when no clock source is selected. The output from the Clock
Select logic is referred to as the timer clock (clk
T2
).
The double buffered Output Compare Register (OCR2A and OCR2B) are compared
with the Timer/Counter value at all times. The result of the compare can be used by the
Waveform Generator to generate a PWM or variable frequency output on the Output
details. The compare match event will also set the Compare Flag (OCF2A or OCF2B)
which can be used to generate an Output Compare interrupt request.
21.2.2 Definitions
Many register and bit references in this document are written in general form. A lower
case “n” replaces the Timer/Counter number, in this case 2. However, when using the