
453
42073A-MCU Wireless-02/13
ATmega2564/1284/644RFR2
depend on how much time is needed to charge the S/H capacitor, which can vary
widely. The user is recommended to only use low impedance sources with slowly
varying signals, since this minimizes the required charge transfer to the S/H capacitor.
The required tracking time (input sampling switch closed) tDTRCK to settle to within 1 LSB
can be estimated to
ns
k
Z
t
OUT
DTRCK
097
.
0
)
2000
/
(
+
=
for ZOUT > 3k (worst case: maximum input step). A minimum tracking time of 500ns is
guaranteed by the conversion logic. Based on the ADC clock frequency the bits
ADTHT[1:0] of register ADCSRC allow the adjustment of the tracking time to the user’s
requirements.
Tracking time requirements should also be considered for the differential mode. The
input signal is sampled by the gain amplifier. The value of the input capacitance CS/H
depends on the selected gain (~7pF for 200x gain, <1pF otherwise). The tracking is
equal to 50% of the clock period of CKADC2. Hence in differential mode a slower clock
frequency is required for input sources with high impedance.
Figure 27-11. Analog Input Circuitry
A D C n
IIL
IIH
C S /H = 1 4 p F
V A V D D /2
2 k
Signal components higher than the Nyquist frequency (fADC/2) should not be present for
either kind of channels, to avoid distortion from unpredictable signal convolution. The
user is advised to remove high frequency components with a low-pass filter before
applying the signals as inputs to the ADC.
27.7.2 Analog Noise Canceling Techniques
Digital circuitry inside and outside the device generates EMI which might affect the
accuracy of analog measurements. If conversion accuracy is critical, the noise level can
be reduced by applying the following techniques:
1. Keep analog signal paths as short as possible. Make sure analog tracks run over the
ground plane, and keep them well away from high-speed switching digital tracks.
2. Use the ADC noise canceller function to reduce induced noise from the CPU.
3. If any ADC port pins are used as digital outputs, it is essential that these do not
switch while a conversion is in progress.
27.7.3 Offset Compensation Schemes
The differential amplifier has a built-in offset cancellation circuitry that nulls the offset of
differential measurements as much as possible. The remaining offset in the analog path
can be measured directly by selecting the same channel for both differential inputs. This
offset residue can then be subtracted in software from the measurement results. The
offset on any channel can be reduced below one LSB using this kind of software based
offset correction.