參數(shù)資料
型號: MC56F8323
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 16-bit Hybrid Controller(16位混合控制器)
中文描述: 16位混合控制器(16位混合控制器)
文件頁數(shù): 89/132頁
文件大?。?/td> 2202K
代理商: MC56F8323
Register Descriptions
56F8323 Technical Data
Preliminary
89
6.5.9.11 Serial Communications Interface 0 Enable (SCI0)—Bit 4
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
6.5.9.12 Serial Peripheral Interface 1 Enable (SPI1)—Bit 3
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
6.5.9.13 Serial Peripheral Interface 0 Enable (SPI0)—Bit 2
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
6.5.9.14 Reserved—Bit 1
This bit field is reserved or not implemented. It is read as 1 and cannot be modified by writing.
6.5.9.15 Pulse Width Modulator A Enable (PWMA)—Bit 0
Each bit controls clocks to the indicated peripheral.
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
6.5.10
I/O Short Address Location Register (SIM_ISALH and
SIM_ISALL)
The I/O Short Address Location registers are used to specify the memory referenced via the I/O
short address mode. The I/O short address mode allows the instruction to specify the lower six bits
of address; the upper address bits are not directly controllable. This register set allows limited
control of the full address, as shown in
Figure 6-13
.
Note:
If this register is set ot something other than the top of memory (EOnCE register space) and
the EX bit in the OMR is set to 1, the JTAG port cannot access the on-chip EOnCE registers,
and debug functions will be affected.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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