參數(shù)資料
型號(hào): MC56F8323
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 16-bit Hybrid Controller(16位混合控制器)
中文描述: 16位混合控制器(16位混合控制器)
文件頁數(shù): 59/132頁
文件大?。?/td> 2202K
代理商: MC56F8323
Register Descriptions
56F8323 Technical Data
Preliminary
59
5.6.3.5
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0
through 2. It is disabled by default.
Low Voltage Detector Interrupt Priority Level (LVI IPL)—Bits 7–6
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.3.6
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Reserved—Bits 5–2
5.6.3.7
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0
through 2. It is disabled by default.
External IRQ A Interrupt Priority Level (IRQA IPL)—Bits 1–0
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.6.4
Interrupt Priority Register 3 (IPR3)
Figure 5-6 Interrupt Priority Register 3 (IPR3)
5.6.4.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Reserved—Bits 15–10
5.6.4.2
FlexCAN Message Buffer Interrupt Priority Level
(FCMSGBUF IPL)—Bits 9–8
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0
through 2. They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
Base + $3
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
0
0
0
0
0
FCMSGBUF IPL
FCWKUP IPL
FCERR IPL
FCBOFF IPL
0
0
Write
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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