參數(shù)資料
型號(hào)： MC56F8323
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： 16-bit Hybrid Controller(16位混合控制器)
中文描述： 16位混合控制器（16位混合控制器）
文件頁數(shù)： 78/132頁
文件大?。?/td> 2202K
代理商： MC56F8323
78
56F8323 Technical Data
Preliminary
6.3 Operating Modes
Since the SIM is responsible for distributing clocks and resets across the chip, it must understand
the various chip operating modes and take appropriate action. These are:
Reset Mode,
which has two submodes:
— Total Reset Mode
– 56800E Core and all peripherals are reset
— Core-Only Reset Mode
– 56800E Core in reset, peripherals are active
– This mode is required to provide the on-chip Flash interface module time to load data from
Flash into FM registers.
Run Mode
The primary mode of operation for this device, in which the 56800E controls chip operation
Debug Mode
56800E is controlled via JTAG/EOnCE when in debug mode. All peripherals, except the COP and
PWMs, continue to run. COP is disabled and PWM outputs are optionally switched off to disable
any motor from being driven; see the PWM chapter in the
56F8300 Peripheral User Manual
for
details.
Wait Mode
In Wait mode, the core clock and memory clocks are disabled. Optionally, the COP can be stopped.
Similarly, it is an option to switch off PWM outputs to disable any motor from being driven. All
other peripherals continue to run.
Stop Mode
56800E, memory, and most peripheral clocks are shut down. Optionally, the COP and CAN can be
stopped. For lowest power consumption in Stop mode, the PLL can be shut down. This must be
done explicitly before entering Stop mode, since there is no automatic mechanism for this. The
CAN (along with any non-gated interrupt) is capable of waking the chip up from Stop mode, but is
not fully functional in Stop mode.
6.4 Operating Mode Register
Figure 6-1 OMR
See
Section 4.2
for detailed information on how the Operating Mode Register (OMR) MA and MB
bits operate in this device. The EX bit is not functional in this device since there is no external
memory interface. For all other bits, see the
56F8300 Peripheral User Manual
.
Note:
The OMR is not a Memory Map register, it is directly accessible in code through the acronym
OMR.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NL
CM
XP
SD
R
SA
EX
0
MB
MA
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RESET
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8323EVM 功能描述:開發(fā)板和工具包 - 其他處理器 MC56F832X Dev Kit RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
MC56F8323EVM 制造商:Freescale Semiconductor 功能描述:Tools Development kit Kit Con
MC56F8323EVME 功能描述:開發(fā)板和工具包 - 其他處理器 MC56F8323 EVAL BRD RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
MC56F8323EVME 制造商:Freescale Semiconductor 功能描述:Evaluation Kit for MC56F832x and MC56F81
MC56F8323MFB60 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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