參數(shù)資料
型號： MC56F8323
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： 16-bit Hybrid Controller(16位混合控制器)
中文描述： 16位混合控制器（16位混合控制器）
文件頁數(shù)： 84/132頁
文件大?。?/td> 2202K
代理商： MC56F8323
84
56F8323 Technical Data
Preliminary
6.5.7
The CLKO select register can be used to multiplex out any one of the clocks generated inside the
clock generation and SIM modules. The default value is SYS_CLK. All other clocks primarily
muxed out are for test purposes only, and are subject to significant unspecified latencies at high
frequencies.
CLKO Select Register (SIM_CLKOSR)
The upper four bits of the GPIO B register can function as GPIO, Quad Decoder #0 signals, or as
additional clock output signals. GPIO has priority and is enabled/disabled via the GPIOB_PER. If
GPIOB[7:4] are programmed to operate as peripheral outputs, then the choice between Quad
Decoder #0 and additional clock outputs is made here in the CLKOSR. The default state is for the
peripheral function of GPIOB[7:4] to be programmed as Quad Decoder #0. This can be changed
by altering PHASE0 through INDEX shown in
Figure 6-9
.
The CLKOUT pin is not bonded out in the 56F8323. Instead, it is offered only as a pad for die-level
testing.
Figure 6-9 CLKO Select Register (SIM_CLKOSR)
6.5.7.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Reserved—Bits 15–10
6.5.7.2
PHASEA0 (PHSA)—Bit 9
0 = Peripheral output function of GPIO B[7] is defined to be PHASEA0
1 = Peripheral output function of GPIO B[7] is defined to be the oscillator clock (MSTR_OSC, see
Figure 3-4
)
6.5.7.3
PHASEB0 (PHSB)—Bit 8
0 = Peripheral output function of GPIO B[6] is defined to be PHASEB0
1 = Peripheral output function of GPIO B[6] is defined to be SYS_CLK2
6.5.7.4
INDEX0 (INDEX)—Bit 7
0 = Peripheral output function of GPIO B[5] is defined to be INDEX0
1 = Peripheral output function of GPIO B[5] is defined to be SYS_CLK
6.5.7.5
HOME0 (HOME)—Bit 6
0 = Peripheral output function of GPIO B[4] is defined to be HOME0
1 = Peripheral output function of GPIO B[4] is defined to be the prescaler clock (FREF, see
Figure 3-4
)
Base + $A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
0
0
0
0
0
PHSA PHSB
INDEX
HOME
CLK
DIS
CLKOSEL
Write
RESET
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8323EVM 功能描述:開發(fā)板和工具包 - 其他處理器 MC56F832X Dev Kit RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
MC56F8323EVM 制造商:Freescale Semiconductor 功能描述:Tools Development kit Kit Con
MC56F8323EVME 功能描述:開發(fā)板和工具包 - 其他處理器 MC56F8323 EVAL BRD RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
MC56F8323EVME 制造商:Freescale Semiconductor 功能描述:Evaluation Kit for MC56F832x and MC56F81
MC56F8323MFB60 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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