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11. Interrupts
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T
5
8
/
C
2
3
M
,
5
8
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2
3
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p
u
o
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G
5
8
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2
3
M
b7
b6
b5
b4
b3
b2
b1
b0
i = 0, 1
j = 0 to 7
Function
Interrupt Enable Register
Bit Name
Bit
Symbol
Address
After Reset
IIO0IE to IIO5IE, IIO8IE to IIO11IE
See below
0000 00002
RW
0 : Disables an interrupt by bit 1 in IIOiIR register
1 : Enables an interrupt by bit 1 in IIOiIR register
0 : Disables an interrupt by bit 7 in IIOiIR register
1 : Enables an interrupt by bit 7 in IIOiIR register
0 : Disables an interrupt by bit 6 in IIOiIR register
1 : Enables an interrupt by bit 6 in IIOiIR register
0 : Disables an interrupt by bit 5 in IIOiIR register
1 : Enables an interrupt by bit 5 in IIOiIR register
0 : Disables an interrupt by bit 4 in IIOiIR register
1 : Enables an interrupt by bit 4 in IIOiIR register
0 : Disables an interrupt by bit 2 in IIOiIR register
1 : Enables an interrupt by bit 2 in IIOiIR register
0 : Interrupt request is used for DMAC, DMAC II
1 : Interrupt request is used for interrupt
IRLT
Interrupt Request
Select Bit(2)
Address
00B016
00B116
00B216
00B316
00B416
00B516
00B816
00B916
00BA16
00BB16
Bit 7
CAN10E
CAN11E
-
SRT0E
CAN12E
-
CAN00E
CAN01E
CAN02E
Bit Symbols for the Interrupt Enable Register
BT1E
TM1jE
PO1jE
SIOiRE
SIOiTE
GiTOE
GiRIE
SRT
iE
CAN0kE
CAN1mE
CAN1WUE
-
Bit 6
-
SRT
1E
CAN1WUE
-
Bit 5
SIO0RE
SIO0TE
SIO1RE
SIO1TE
-
Bit 4
G0RIE
G0TOE
G1RIE
G1TOE
BT1E
-
Bit 3
-
Bit 2
TM13E/PO13E
TM14E/PO14E
TM12E/PO12E
TM10E/PO10E
TM17E/PO17E
-
Bit 1
-
TM11E/PO11E
TM15E/PO15E
TM16E/PO16E
-
Symbol
IIO0IE
IIO1IE
IIO2IE
IIO3IE
IIO4IE
IIO5IE
IIO8IE
IIO9IE
IIO10IE
IIO11IE
Bit 0
IRLT
RW
(Note 1)
(b3)
(Note 1)
: Intelligent I/O Base Timer Interrupt Enabled
: Intelligent I/O Time Measurement j Interrupt Enabled
: Intelligent I/O Waveform Generating Function j Interrupt Enabled
: Intelligent I/O Communication Unit i Receive Interrupt Enabled
: Intelligent I/O Communication Unit i Transmit Interrupt Enabled
: Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Enabled (TO: Output to Transmit)
: Intelligent I/O Communication Unit i HDLC Data Processing Function Interrupt Enabled (RI: Input to Receive)
: Intelligent I/O Special Communication Function Interrupt Enabled
: CAN0 Communication Function Interrupt Enabled (k = 0 to 2)
: CAN1 Communication Function Interrupt Enabled (m = 0 to 2)
: CAN1 Wake-up Interrupt Enabled
: Reserved Bit. Set to "0".
Reserved Bit
Set to "0"
0
NOTES:
1. See table below for bit symbols.
2. If an interrupt request is used for interrupt, set bit 1, 2, 4 to 7 to "1" after the IRLT bit is set to "1".
RW
Figure 11.15 IIO0IE to IIO5IE, IIO8IE to IIO11IE Registers