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9. Clock Generation Circuit
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Figure 9.8 PM2 Register
RW
PM21
(b0)
PM22
PM26
PM27
b6
b7
RW
0 : Clock selected by the CM07 bit
1 : Main Clock
0 : f1
1 : Main Clock
CPU Clock Select Bit 3
CAN Clock Select Bit
PM24
PM25
RW
(b3)
Processor Mode Register 2(1)
After Reset
0016
Address
001316
Symbol
PM2
RW
System Clock Protect
Bit(2, 3)
RW
WDT Count Source
Protect Bit(2, 4)
Bit Name
Function
Bit
Symbol
RW
Reserved Bit
Set to "0"
0 : Protects the clock by a PRCR
register setting
1 : Disables a clock change
0 : Selects BCLK as count source of
the watchdog timer
1 : Selects the on-chip oscillator
clock as count source of the
watchdog timer
Reserved Bit
Set to "0"
NOTES:
1. Rewrite the PM2 register after the PRC1 bit in the PRCR register is set to "1" (write enable).
2. Once the PM22 and PM21 bits are set to "1", they can not be set to "0" by program.
3. When the PM21 bit is set to "1",
the CPU clock keeps running when the WAIT instruction is executed;
nothing is changed even if following bits are set to either "0" or "1".
the CM02 bit in the CM0 register (the peripheral function clock is not stopped in wait mode.)
the CM05 bit in the CM0 register (the main clock is not stopped.)
the CM07 bit in the CM0 register (a CPU clock source is not changed.)
the CM10 bit in the CM1 register (the microcomputer does not enter stop mode.)
the CM17 bit in the CM1 register (a CPU clock source is not changed.)
the CM20 bit in the CM2 register (oscillation stop detect function settings are not changed.)
all bits in the PLC0 and PLC1 registers (PLL frequency synthesizer function settings are not changed.)
4. When the PM22 bit is set to "1",
the on-chip oscillator clock becomes a count source of the watchdog timer after the on-chip oscillator starts;
write to the CM10 bit is disabled (the microcomputer does not enter stop mode.);
the watchdog timer keeps running when the microcomputer is in wait mode and hold state.
0 0 : Peripheral function clock
0 1 : XIN clock
1 0 : On-chip oscillator clock
1 1 : Do not set to this value
f2n Count source
Select Bit
RW
b7
b6
b5
b4
b3
b2
b1
b0
0