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M30245 Group
Programmable I/O Ports
Rev.2.00
Oct 16, 2006
page 180 of 264
REJ03B0005-0200
Programmable I/O ports
There are 83 programmable I/O ports: P0 to P10 (excluding P85). Each port can be set independently for input or
output using the direction register. A pull-up resistance for each block of 4 ports can be set. P85 is an input-only port
and has no built-in pull-up resistance.
Figure 1.132 to Figure 1.135 show the programmable I/O ports. Figure 1.136 shows the I/O pins.
Each pin functions as a programmable I/O port and as the I/O for the built-in peripheral devices.
To use the pins as the inputs for the built-in peripheral devices, set the direction register of each pin to input mode.
When the pins are used as the outputs for the built-in peripheral devices, they function as outputs regardless of the
contents of the direction registers. See the descriptions of the respective functions for how to set up the built-in
peripheral devices.
Direction registers
Figure 1.137 shows the direction registers.
These registers are used to choose the direction of the programmable I/O ports. Each bit in these registers corre-
sponds one for one to each I/O pin.
Note: There is no direction register bit for P85.
Port registers
Figure 1.138 shows the port registers.
These registers are used to write and read data for input and output to and from an external device. A port register
consists of a port latch to hold output data and a circuit to read the status of a pin. Each bit in port registers corre-
sponds one for one to each I/O pin.
Pull-up control registers
Figure 1.139 shows the pull-up control registers.
The pull-up control register can be set to apply a pull-up resistance to each block of 4 ports. When ports are set to
have a pull-up resistance, the pull-up resistance is connected only when the direction register is set for input.
However, in memory expansion mode and microprocessor mode, the pull-up control register of P0 to P3, P40 to P43,
and P5 is invalid.
High drive capacity register
Figure 1.140 shows the Port P7 drive capacity register. Port P7 can be configured to drive an LED by increasing the drive
strength of the corresponding N-channel transistor bits.
Port control register
Figure 1.141 shows the port control register.
The bit 0 of port control resister is used to read Port P1:
0: When Port P1 is an input port, the port input level is read.
When Port P1 is an output port, the contents of Port P1 register are read.
1: The contents of Port P1 register are always read.
This register is valid for the external bus width which is 8 bits in microprocessor mode or memory expansion mode.
Unused pin connections
Table 1.64 lists an example of unused pins in single chip mode. Table 1.65 lists an example of unused pins in memory
expansion mode. Figure 1.142 shows an example connection for unused pins.