
M30245 Group
Interrupts
Rev.2.00
Oct 16, 2006
page 65 of 264
REJ03B0005-0200
Address-Match Interrupt
An address-match interrupt is generated when the address-match interrupt address register contents match the
program counter value. Two address-match interrupts can be set, each of which can be enabled and disabled by an
address-match interrupt enable bit. The interrupt enable flag (I flag) does not affect address-match interrupts and
processor interrupt priority level (IPL).
Note: When the external data bus width is set to 8 bits, the address match interrupt cannot be used for external areas.
Figure 1.40 shows the address-match interrupt-related registers.
Figure 1.40. Address-match interrupt-related register Interrupt precautions
Precautions
Reading address 0000016
When maskable interrupt occurs, the CPU reads the interrupt information (the interrupt number and interrupt request
level) in the interrupt sequence. The interrupt request bit of the interrupt written in address 0000016 will then be set to "0".
Do not read address 0000016 by software. Reading address 0000016 by software sets enabled highest priority inter-
rupt source request bit to "0". Though the interrupt is generated, the interrupt routine may not be executed.
Setting the stack pointer
The value of the stack pointer immediately after reset is initialized to 000016. Accepting an interrupt before setting a
value in the stack pointer may cause program runaway. Be sure to set a value in the stack pointer before accepting an
interrupt.
_______
When using the NMI interrupt, initialize the stack pointer at the beginning of a program. Generating any interrupts
_______
including the NMI interrupt is prohibited for the first instruction immediately after reset.
Bit name
Bit symbol
Symbol
Address
When reset
AIER
000916
XXXXXX002
Address match interrupt enable register
Function
W
R
Address match interrupt 0
enable bit
0 : Interrupt disabled
1 : Interrupt enabled
AIER0
Address match interrupt 1
enable bit
AIER1
Symbol
Address
When reset
RMAD0
001216 to 001016
X0000016
RMAD1
001616 to 001416
X0000016
Nothing is assigned.
b7
b6
b5
b4
b3
b2
b1
b0
W
R
Address setting register for address match interrupt
Function
Values that can be set
Address match interrupt register i (i = 0, 1)
0000016 to FFFFF16
Nothing is assigned.
0 : Interrupt disabled
1 : Interrupt enabled
b0 b7
b0
b3
(b19)
(b16)
b7
b0
(b15)
(b8)
b7
(b23)
Write 0 when writing to these bits. If read, the value is indeterminate.