![](http://datasheet.mmic.net.cn/30000/M30245MC-XXXGP_datasheet_2358670/M30245MC-XXXGP_89.png)
M30245 Group
Universal Serial Bus
Rev.2.00
Oct 16, 2006
page 87 of 264
REJ03B0005-0200
USB Endpoint 0 CSR
The Endpoint 0 CSR (Control & Status register), shown in Figure 1.55, contains the control and status information
for EP0.
EP0CSR0(OUT_BUF_RDY):
A status flag, "1" indicates a SETUP packet or an OUT data set is in the OUT buffer, ready for the CPU to unload.
During the data phase, if noncontinuous mode is set, the OUT_BUF_RDY bit is "1" when:
A data packet is received from the host
During the data phase, if continuous mode is set, the OUT_BUF_RDY bit is "1" when:
A data set equal to 128 bytes is received from the host
A short packet is received from the host
A control write status phase has started with pending OUT data packets in the buffer.
EP0CSR1(IN_BUF_RDY):
A status flag, "1" indicates a data set is in the IN buffer, ready for transmission. The USB FCU clears this bit after the data
set is successfully transmitted to the host, or the EP0CSR5 (SETUP_END) bit is set.
EP0CSR2 (SETUP):
A status flag, "1" indicates a SETUP packet has been received. The SETUP Flag is a subset of the OUT_BUF_RDY flag.
EP0CSR3(DATA_END):
A status flag, "1" indicates the CPU sets the DATA_END bit. The USB FCU clears this flag after the status phase has
started or a new SETUP is received. This flag is a maskable flag. If DATA_END Flag Mask is a "1" (default), this
DATA_END flag is always a "0" and no EP0 interrupt is caused by the DATA_END flag being cleared.
EP0CSR4(FORCE_STALL):
A status flag, "1" indicates a protocol error when one of the following occurs:
Host sends an IN token in the absence of a SETUP stage
Host sends a bad data toggle in the STATUS stage, (i.e. DATA0 is used)
Host sends a bad data toggle in the SETUP stage, (i.e. DATA1 is used)
Host requests more data than specified in the SETUP state, (i.e. IN token comes after DATA_END bit is set)
Host sends more data than specified in the SETUP state, (i.e. OUT token comes after DATA_END bit is set)
Host sends a larger data packet than the MAXP size
All of the conditions stated (except bad data toggle in the SETUP stage) cause the device to send a STALL handshake
for the current IN/OUT transaction. For the bad data toggle in the SETUP stage, the device sends ACK for the SETUP
stage and then sends STALL for the next IN/OUT transaction. A STALL handshake caused by the above conditions lasts
for one transaction and terminates the ongoing control transfer. Any packet after the STALL handshake will be seen as
the beginning of a new control transfer.