參數(shù)資料
型號(hào)： KBE00S009M
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 1Gb NAND x 2 + 256Mb Mobile SDRAM x 2
中文描述： 1Gb的NAND × 2 256Mb的移動(dòng)SDRAM × 2
文件頁數(shù)： 9/86頁
文件大小： 1898K
代理商： KBE00S009M
MCP MEMORY
9
KBE00S009M-D411
Revision 1.0
May 2005
512Bytes
16 Bytes
Figure 1. FUNCTIONAL BLOCK DIAGRAM
Figure 2. ARRAY ORGANIZATION
V
CC
V
SS
X-Buffers
Latches
& Decoders
2G + 64M Bits
NAND Flash
ARRAY
Command
Register
(512 + 16)Bytes x 524,288
Y-Gating
Page Register & S/A
I/O Buffers & Latches
Y-Buffers
Latches
& Decoders
Control Logic
& High Voltage
Generator
Global Buffers
Output
Driver
A
9
- A
27
A
0
- A
7
Command
CE
RE
WE
WP
I/0 0
I/0 7
V
CC/
V
CCQ
V
SS
A
8
1st half Page Register
(=256 Bytes)
2nd half Page Register
(=256 Bytes)
256K Pages
(=8,192 Blocks)
512 Bytes
8 bits
16 Bytes
1 Block = 32 Pages
= (16K + 512) Bytes
I/O 0 ~ I/O 7
1 Page = 528 Bytes
1 Block = 528 Bytes x 32 Pages
= (16K + 512) Bytes
1 Device = 528Bytes x 32Pages x 16,384 Blocks
= 2,112 Mbits
Column Address
Row Address
(Page Address)
Page Register
CLE ALE
NOTE
: Column Address : Starting Address of the Register.
00h Command(Read) : Defines the starting address of the 1st half of the register.
01h Command(Read) : Defines the starting address of the 2nd half of the register.
* A
8
is set to "Low" or "High" by the 00h or 01h Command.
* L must be set to "Low".
* The device ignores any additional input of address cycles than reguired.
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
1st Cycle
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
2nd Cycle
A
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
3rd Cycle
A
17
A
18
A
19
A
20
A
21
A
22
A
23
A
24
4th Cycle
A
25
A
26
A
27
*L
*L
*L
*L
*L
相關(guān)PDF資料
PDF描述
KBE00S009M-D411 1Gb NAND x 2 + 256Mb Mobile SDRAM x 2
KBJ2501 25A SINGLE PHASE SILICON BRIDGE RECTIFIER
KBJ2502 25A SINGLE PHASE SILICON BRIDGE RECTIFIER
KBJ2503 25A SINGLE PHASE SILICON BRIDGE RECTIFIER
KBJ2504 25A SINGLE PHASE SILICON BRIDGE RECTIFIER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KBE00S009M-D411 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1Gb NAND x 2 + 256Mb Mobile SDRAM x 2
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