參數(shù)資料
型號(hào)： ISL5416EVAL1
廠商： Intersil Corporation
英文描述： Four-Channel Wideband Programmable DownConverter
中文描述： 四通道可編程寬帶下變頻器
文件頁(yè)數(shù)： 38/71頁(yè)
文件大?。?/td> 1128K
代理商： ISL5416EVAL1
38
The ISL5416 can be programmed to respond to the
synchronization inputs, SYNCIn1 and SYNCIn2, in a number
of ways. This register controls the range control response to
the SYNC inputs. The response of the channels to the SYNC
inputs is controlled by IWA = *000h. CLKO start up from
SYNCIn1 or SYNCIn2 is controlled in IWA = 0000h.
TABLE 27. XOUT DATA VERSUS TIME SLOT ROUTING, TIME SLOTS 6, 7 (IWA = 0*04h)
RESET STATE = 0x00000000h
P(31:0)
FUNCTION
31:27
RESERVED.
26:16
SLOT 7 CONTROL (see Table 24)
15:11
RESERVED.
10:0
SLOT 6 CONTROL (see Table 24)
TABLE 28. INPUT SYNCIn1/SYNCIn2 FUNCTION SELECT (IWA = 0*05h)
RESET STATE = 0x00000000h
P(31:0)
FUNCTION
31
ENABLE SYNCIn2 TO RANGE CONTROL.
1 = range control block responds to SYNCIn2 according to bits 19:16 settings.
0 = range control block does not respond to SYNCIn2.
30:20
RESERVED. Set to 0.
19
READ UPDATE ON SYNCIn2.
1 = attenuator control accumulator contents are transferred to the read holding register on SYNCIn2.
18
LOAD ACCUMULATOR ON SYNCIn2.
1 = attenuator control accumulator is loaded from the uP load register (0*19) on a SYNCIn2.
17
RANGE CONTROL STARTUP ON SYNCIn2.
1 = enable range control on SYNCIn2 if 0*10, bit 1 is set. Range control is disabled on reset or by writing a zero to IWA = 0*10h, bit
0. If this bit is set, bit 0 of 0*10 is set on a SYNCIn2.
16
TIMING RESET ON SYNCIn2.
1 = reset range control timing on SYNCIn2 if 0*10, bit 1 is set. Once started, the timers will run until disabled (bit 1 of 0*10h or HW
reset).
15
ENABLE SYNCIn1 TO RANGE CONTROL.
1 = range control block responds to SYNCIn1 according to bits 3:0 settings.
0 = range control block does not respond to SYNCIn1.
14:4
RESERVED. Set to 0.
3
READ UPDATE ON SYNCIn1.
1 = attenuator control accumulator contents are transferred to the read holding register on SYNCIn1.
2
LOAD ACCUMULATOR ON SYNCIn1.
1 = attenuator control accumulator is loaded from the uP load register (0*19) on a SYNCIn1.
1
RANGE CONTROL STARTUP ON SYNCIn1.
1 = enable VGA startup control on SYNCIn2 if 0*10, bit 1 is set. Range control is disabled on reset or by writing a zero to 0*10, bit 0.
If this bit is set, bit 0 of 0*10 is set on a SYNCIn1. Disable on reset.
0
TIMING RESET ON SYNCIn1.
1 = reset range control timing on SYNCIn1 if 0*10, bit 1 is set. Once started, the timers will run until disabled (bit 1 of 0*10h or HW
reset).
ISL5416
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