參數(shù)資料
型號： ISL5416EVAL1
廠商： Intersil Corporation
英文描述： Four-Channel Wideband Programmable DownConverter
中文描述： 四通道可編程寬帶下變頻器
文件頁數(shù)： 34/71頁
文件大?。?/td> 1128K
代理商： ISL5416EVAL1
34
A test register is provided for the processor to input data to
the part. The register can be selected as the input for any or
all of the channels. The test input is 16 bits of data plus 3 bits
of exponent. The input enable is also controllable by the uP.
The choices are always active, always inactive, and one
clock wide input enable each time the uP writes to IWA =
0003h. This last choice is for inputting test data via the uP
interface. The Input enable choice is done in the channel at
IWA = *001h, bits 19:17.
TABLE 16. Eout (RANGE CONTROL) SOURCE SELECT (GWA = 0001h)
RESET STATE = 0x00000000h
P(31:0)
FUNCTION
31:16
UNUSED.
15:12
Eout(15:12).
1XXX = set to 0000.
0000 = AH (A range select mapped bits 7:4).
0001 = AL (A range select mapped bits 3:0).
0010 = BH (B range select mapped bits 7:4).
0011 = BL (B range select mapped bits 3:0).
0100 = CH (C range select mapped bits 7:4).
0101 = CL (C range select mapped bits 3:0).
0110 = DH (D range select mapped bits 7:4).
0111 = DL (D range select mapped bits 3:0).
See IWA = 0*17h and 0*18h.
11:8
Eout(11:8).
See bits 15:12.
7:4
Eout(7:4).
See bits 15:12.
3:0
Eout(3:0).
See bits 15:12.
TABLE 17. TEST INPUT DATA REGISTER (GWA = 0002h)
RESET STATE = 0x00000000h
P(31:0)
FUNCTION
31:26
RESERVED. Set to 0.
25
RESERVED. Set to 1.
24
RESERVED. Set to 0.
23
ENABLE TESTOUT D(15:0) TO DOUT(15:0). Set to 0 for normal operation. See Table 18 below.
22
ENABLE TESTOUT C(15:0) TO COUT(15:0). Set to 0 for normal operation. See Table 18 below.
21
ENABLE TESTOUT B(15:0) TO BOUT(15:0). Set to 0 for normal operation. See Table 18 below.
20
ENABLE TESTOUT A(15:0) TO AOUT(15:0). Set to 0 for normal operation. See Table 18 below.
19
RESERVED. Set to 0.
18:16
EXPONENT.
000 = add 0 dB of gain.
111 = add 42 dB of gain.
15:0
DATA. Twos complement.
TABLE 18. TESTOUT X(15:0) BUS SIGNALS (CAN BE OR’d WITH NORMAL OUTPUT ON XOUT BY SETTING BITS 23:20, GWA = 0002h)
15
RANGE CONTROL END OF INTEGRATION PERIOD SIGNAL.
14
RANGE CONTROL END OF DELAY SIGNAL
13
RANGE CONTROL COUNTER LOAD SIGNAL (SYNC and slot counter generated)
12
RANGE CONTROL MAGNITUDE GREATER THAN IMMEDIATE THRESHOLD
11
RANGE CONTROL AVERAGE MAGNITUDE GREATER THAN THRESHOLD 2
10
RANGE CONTROL AVERAGE MAGNITUDE SMALLER THAN THRESHOLD 3
9
RESAMPLER NCO2 2X CARRY OUT
ISL5416
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