
IP100
BIT
9..8
IP100-DS-R03
May 27, 2003
37/92
Copyright
2003, IC Plus Corp.
All rights reserved.
Preliminary, Specification subject to change without notice.
BIT NAME
ForcedConfig[1..0]
R/W
R/W
BIT DESCRIPTION
Forced Configuration. ForcedConfig[1..0] is used to enable and
select a Forced Configuration mode for the IP100. Forced
Configuration mode is targeted toward embedded applications
which do not utilize an EEPROM. In Forced Configuration mode, the
IP100 is accessed via a PCI bus without first performing PCI
configuration or loading parameters from an EEPROM.
The ForcedConfig[1..0] bits 9 through 8 can also be set on reset using
ED[4:3].
BIT 9
BIT 8
FORCED CONFIGURATION MODE
0
0
None
0
1
1
1
X
Reserved
In Forced Configuration mode 1, the IP100 is configured as follows:
I/O base address = 0x200
I/O target cycles = enabled
Memory target cycles = disabled
Bus master cycles = enabled
Expansion ROM cycles = disabled.
Forced Configuration Bit 2. ForcedConfig[2] is used to select an
alternate Vendor and Device for the IP100.
The ForcedConfig[2] can also be set on reset using ED[2].
FORCEDCONFIG[2]
VENDOR ID
0
0x13F0
Reserved for future use.
Speed Up Mode. SpeedupMode is used for simulation purposes only.
When SpeedupMode is a logic 1 IP100 operation is modified to
decrease simulation time. SpeedupMode can also be set on reset
using signal pin ED[5].
Light Emitting Diode Mode. LEDMode is used to control the LED signal
pin (EOEN, LEDDPLXN, LEDPWRN) functionality. When LEDMode is
a logic 0 the LED signal pins operate in LED mode 0. When LEDMode
is a logic 1 the LED signal pins operate in LED mode 1.
Note, when LED signals alternate between logic 1/0, they alternate
over a 41.89ms period where the logic 0 (or LED ON) state persists
for 5.24ms and the logic 1 (or LED OFF) state persists for 36.65ms.
10
ForcedConfig[2]
R/W
DEVICE ID
0x0201
12..11
13
Reserved
SpeedupMode
N/A
R/W
14
LEDMode
R/W