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參數(shù)資料
| 型號： | ICSXXXXY |
| 英文描述： | Auto-Negotiation Advertisement Register (register 4 [0x04]) |
| 中文描述： | 自動談判廣告登記（注冊4 [0x04]） |
| 文件頁數(shù)： | 44/66頁 |
| 文件大小： | 1725K |
| 代理商： | ICSXXXXY |
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44
ICS1890
When configuration through Auto-Negotiation is selected,
the DPXSEL and 10/100SEL settings control the Auto-
Negotiation register 4 default settings and Auto-Negotiation
is enabled. When configuration without Auto-Negotiation is
selected DPXSEL controls the duplex setting and 10/100SEL
controls the data rate setting.
When this pin is a logic one, software bits have priority over
hardware pin settings. The 10/100SEL pin becomes an output
indicating the link speed when the link is established and
parallels bit (17:15). The DPXSEL pin becomes an output
indicating the link duplex state when the link is established
and parallels bit (17:14). The ANSEL pin becomes an output
indicating whether auto-negotiation is being used and parallels
bit (0:12).
10/100 Select
This pin is an input or an output depending on the setting of
the HW/SW pin.
10/100SEL
In HW mode, it is an input and controls speed selection
directly or through Auto-Negotiation. When the input is low,
10Base-T is selected. When the input is high, 100Base-TX is
selected.
In SW mode, this pin is an output and correctly reflects the
selected speed when the link is established (LSTA is asserted).
The output is low when 10Base-T is selected and high when
100Base-TX is selected which gives the same indication as
register bit (17:15).
Note this pin also affects the MAC - PHY interface that is used
in conjunction with the MII/SI pin.
Duplex Select
This pin is an input or an output depending on the setting of
the HW/SW pin.
DPXSEL
In HW mode, it is an input and controls duplex selection
directly or through Auto-Negotiation. When the input is low,
Half Duplex is selected. When the input is high, Full Duplex is
selected.
In SW mode, this pin is an output and correctly reflects the
selected duplex mode when the link is established (LSTA is
asserted). The output is low when Half Duplex is selected and
high when Full Duplex is selected which gives the same indication
as register bit (17:14).
In Full Duplex mode, CRS is asserted only on receive activity.
In Full Duplex mode, COL is disabled and always remains low.
Auto-Negotiation Select
This pin is an input or output depending on the setting of the
HW/SW pin.
ANSEL
In HW mode, it is an input and controls the enabling of Auto-
Negotiation. When the input is low, Auto-Negotiation is disabled.
When the input is high, Auto-Negotiation is enabled and the
single technology selected by 10/100SEL and DPXSEL is
advertised.
In SW mode, this pin is an output and reflects whether Auto-
Negotiation has been enabled or disabled. The output is low
when Auto-Negotiation is disabled and high when Auto-
Negotiation is enabled which gives the same indication as
register bit (0:12).
Invert Transmit Clock Latching Setting
The
ICS1890
allows transmit data to be latched relative to
either TXCLK or REF_IN. Latching the data to TXCLK is the
behavior specified in the 100Base-T MII specification, but in
some applications it is desirable to latch data with the REF_IN
clock. An example of where this might be beneficial is in a
repeater application where all data transmission on multiple
1890s need to be synchronized to a common clock.
ITCLS~
To select the proper setting of this pin, first choose the setting
of the NOD/REP pin. Then select the setting of the ITCLS pin
that latches the transmit data with the clock of your choice.
The following table shows the possible combinations. This
pin has an internal pull-up so it may be left not connected for
some applications.
Hardware/Software Priority Select
When this pin is logic zero, hardware pins have priority over
software settings. The 10/100SEL pin becomes an input and
controls speed selection. The DPXSEL pin becomes an input
and controls duplex selection. The ANSEL pin becomes an
input and chooses configuration with or without Auto-Negotiation.
HW/SW
NOD/REP
ITCLS
0
1
0
1
Latching Clock
REF_IN
TXCLK
TXCLK
REF_IN
NOD
(0)
REP
(1)
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