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參數(shù)資料
| 型號： | ICSXXXXY |
| 英文描述： | Auto-Negotiation Advertisement Register (register 4 [0x04]) |
| 中文描述： | 自動談判廣告登記（注冊4 [0x04]） |
| 文件頁數(shù)： | 33/66頁 |
| 文件大?。?/td> | 1725K |
| 代理商： | ICSXXXXY |
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33
ICS1890
SQE Test Inhibit (bit 2)
When this bit is set to a logic one, SQE testing is disabled.
When this bit is set to a logic zero, a normal 10Base-T SQE test
is performed by pulsing the Collision signal for a short time
shortly after each packet transmission completes.
Note that the SQE Test is automatically inhibited in Full Duplex
and Repeater modes.
Link Loss Inhibit (bit 1)
When this bit is set to a logic one, the 10Base-T Link Integrity
Test state machine is forced into the Link Pass state regardless
of the line conditions. This can be useful in debugging a bad
link segment. When this bit is set to a logic zero, the state
machine behaves normally.
Squelch Inhibit (bit 0)
When this bit is set to a logic one, the receive squelch circuitry
is disabled. This can be useful in debugging a bad link segment
or for link segments longer than 100 meters. When this bit is
set to a logic zero, the normal Squelch circuitry is enabled to
filter out spurious line noise.
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