參數(shù)資料
型號: ICSXXXXY
英文描述: Auto-Negotiation Advertisement Register (register 4 [0x04])
中文描述: 自動談判廣告登記(注冊4 [0x04])
文件頁數(shù): 17/66頁
文件大小: 1725K
代理商: ICSXXXXY
17
ICS1890
Management Interface
The
ICS1890
provides a management interface to connect to
a management entity. The two wire serial interface is part of
the MII and is described in the MII section. The interface
allows the transport of status information from the
ICS1890
to the management entity and the transport of control information
to the
ICS1890
. It includes a register set, a frame format, and
a protocol.
Management Register Set
The register set includes the mandatory basic control and
status registers and an extended set. The
ICS1890
implements
the following registers.
Control
Status
PHY Identifier
PHY Identifier
Auto-Negotiation Advertisement
Auto-Negotiation Link Partner Ability
Auto-Negotiation Expansion
Reserved by IEEE
Extended Control
QuickPoll Status
10Base-T Operations
Extended Control 2
Reserved by ICS
(register 0)
(register 1)
(register 2)
(register 3)
(register 4)
(register 5)
(register 6)
(registers 7-15)
(register 16)
(register 17)
(register 18)
(register 19)
(registers 20-31)
Management Frame Structure
The management interface uses a serial bit stream with a
specified frame structure and protocol as defined below.
Preamble
SOF
Op Code
Address
Register
TA
Data
Idle
11...11
01
10 (read), 01 (write)
AAAAA
RRRRR
NN
DD...DD
Zo
(32 ones)
(2 bits)
(2 bits)
(5 bits)
(5 bits)
(2 bits)
(16 bits)
high impedance
Preamble
The
ICS1890
looks for a pattern of 32 logic ones followed by
the SOF delimiter before responding to a transaction.
Start of Frame
Following the preamble a start of frame delimiter of zero-one
initiates a transaction.
Operation Code The valid codes are 10 for a read operation
and 01 for a write operation. Other codes are ignored.
Address
There may be up to 32 PHYs attached to the MII. This 5 bit
address is compared to the internal address of the
ICS1890
,
as set by the P[0...4]* pins, for a match.
Register Address
The
ICS1890
uses this field to select one of the registers
within the set. If a non-existent register is specified, the
ICS1890
ignores the command.
TA
This 2-bit field is used by the
ICS1890
to avoid contention
during read transactions. The
ICS1890
will remain in the high
impedance state for the first bit time and drive a logic zero for
the second bit time.
Data
This is a 16-bit field with bit 15 being the first bit sent or
received.
Idle
The
ICS1890
is in the high impedance state during the idle
condition. At least one idle must occur after each write to the
device. No idles are required after a read.
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