參數(shù)資料
型號: HYB39S64800
廠商: SIEMENS AG
英文描述: 64 MBit Synchronous DRAM
中文描述: 64兆位同步DRAM
文件頁數(shù): 15/53頁
文件大?。?/td> 665K
代理商: HYB39S64800
Semiconductor Group
15
HYB39S64400/800/160AT(L)
64MBit Synchronous DRAM
Operating Currents
(T
A
= 0 to 70
o
C, Vdd = 3.3V
±
0.3V
(Recommended Operating Conditions unless otherwise noted)
Notes:
3. These parameters depend on the cycle rate. These values are measured at 100 MHz for -8
and at 66 MHz for -10 parts. Input signals are changed once during tck, excepts for ICC6 and for standby
currents when tck=infinity.
4. These parameters are measured with continuous data stream during read access and all DQ toggling. CL=3
and BL=4 is assumed and the VDDQ current is excluded.
Parameter & Test Condition
Symb.
-8/-8B
-10
Note
max.
OPERATING CURRENT
trc=trcmin., tck=tckmin.
Ouputs open, Burst Length = 4, CL=3
All banks operated in random access,
all banks operated in ping-pong manner
to maximize gapless data access
ICC1
x4
x8
x16
100
110
130
70
75
90
mA
mA
mA
3
PRECHARGE STANDBY CURRENT in
Power Down Mode
CS =VIH (min.), CKE<=Vil(max)
tck = min.
ICC2P
2
2
mA
3
tck = Infinity
ICC2PS
1
1
mA
3
PRECHARGE STANDBY CURRENT in
Non-Power Down Mode
CS = VIH (min.), CKE>=Vih(min)
tck = min.
ICC2N
35
30
mA
3
tck = Infinity
ICC2NS
5
5
mA
3
NO OPERATING CURRENT
tck = min., CS = VIH(min),
active state ( max. 4 banks)
CKE>=VIH(min.)
ICC3N
45
40
mA
3
CKE<=VIL(max.)
ICC3P
8
8
mA
3
BURST OPERATING CURRENT
tck = min.,
Read command cycling
ICC4
x4
x8
x16
60
70
100
40
50
70
mA
mA
mA
3,4
AUTO REFRESH CURRENT
tck = min.,
Auto Refresh command cycling
ICC5
130
90
mA
3
SELF REFRESH CURRENT
Self Refresh Mode, CKE=0.2V
standard version
ICC6
1
1
mA
μ
A
3
L-version
500
500
3
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYB39S64800AT-10 制造商:Siemens 功能描述:8M X 8 SYNCHRONOUS DRAM, 7 ns, PDSO54
HYB39S64800AT-7 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SDRAM
HYB39S64800AT-7.5 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SDRAM
HYB39S64800AT-8 制造商:Infineon Technologies AG 功能描述:
HYB39S64800AT-8B 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:64 MBit Synchronous DRAM