參數(shù)資料
型號: HM17CM256
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 顯示驅(qū)動(dòng)器
英文描述: 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
中文描述: LIQUID CRYSTAL DISPLAY DRIVER, UUC580
封裝: 19.75 X 2.39 MM, GOLD BUMP, DIE-580
文件頁數(shù): 97/111頁
文件大?。?/td> 2094K
代理商: HM17CM256
HM17CM256
- 97 -
I
AC CHARACTERISTICS
SYSTEM BUS READ / WRITE TIMING (80 series CPU interface)
(write timing)
(V
DD
=2.7
3.3V, Ta=-30
+85
°
C)
MAX.
UNIT
ns
ns
ITEM
SYMBOL
t
AH8
t
AS8
CONDITION
MIN.
TBD
TBD
PORT
CS
RS
Address hold timing
Address setup timing
System cycle timing
Write ”L” pulse width
Write ”H” pulse width
t
CYC8
t
WRLW8
t
WRHW8
TBD
TBD
TBD
ns
ns
ns
WR
Data setup timing
Data hold timing
t
DS8
t
DH8
TBD
TBD
ns
ns
D
0
D
15
(V
DD
=2.4
2.7V, Ta=-30
+85
°
C)
MAX.
UNIT
ns
ns
ITEM
SYMBOL
t
AH8
t
AS8
CONDITION
MIN.
TBD
TBD
PORT
CS
RS
Address hold timing
Address setup timing
System cycle timing
Write ”L” pulse width
Write ”H” pulse width
t
CYC8
t
WRLW8
t
WRHW8
TBD
TBD
TBD
ns
ns
ns
WR
Data setup timing
Data hold timing
t
DS8
t
DH8
TBD
TBD
ns
ns
D
0
D
15
(V
DD
=1.7
2.4V, Ta=-30
+85
°
C)
MAX.
UNIT
ns
ns
ITEM
SYMBOL
t
AH8
t
AS8
CONDITION
MIN.
TBD
TBD
PORT
CS
RS
Address hold timing
Address setup timing
System cycle timing
Write ”L” pulse width
Write ”H” pulse width
t
CYC8
t
WRLW8
t
WRHW8
TBD
TBD
TBD
ns
ns
ns
WR
Data setup timing
Data hold timing
notice) All timing reference is 20% and 80% of V
DD
and 80%.
t
DS8
t
DH8
TBD
TBD
ns
ns
D
0
D
15
t
CYC8
t
AS8
CS
WR
RS
D
0
D
15
t
AH8
t
WRLW8
t
WRHW8
t
DS8
t
DH8
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