- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385387 > HM17CM256 (HYNIX SEMICONDUCTOR INC) 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM PDF資料下載
參數(shù)資料
| 型號： | HM17CM256 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | 顯示驅(qū)動器 |
| 英文描述： | 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM |
| 中文描述： | LIQUID CRYSTAL DISPLAY DRIVER, UUC580 |
| 封裝： | 19.75 X 2.39 MM, GOLD BUMP, DIE-580 |
| 文件頁數(shù)： | 17/111頁 |
| 文件大小： | 2094K |
| 代理商： | HM17CM256 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁
HM17CM256
- 17 -
(2) DDRAM and internal register access
DDRAM and internal register are accessed by data bus D
0
~D
7
(D
0
~D
15
), chip select pin (CS),
DDRAM / register select pin (RS), read / write control pin (RD) or WR pin.
When CS=“H”, it is in non-selective state and DDRAM and internal register access is impossible.
During access, Set CS=“L”.
Access selection to DDRAM or internal register is controlled by RS input.
TABLE
RS
Data contents
L
Display RAM data
H
Internal command register
Write process starts after address setting and then the data on the 8bit data bus D
0
~D
7
or 16bit
data bus D
0
~D
15
will be written in by CPU. The data is written at the rising edge of WR (80 series) or
falling edge of E (68 series).
Internally, bus holder data is processed to data bus and data are written to bus holder from CPU
until next cycle.
After address setting, data of assigned address are read at the 1st and 3rd clock, which means it
needs dummy read at the 2nd clock.
There are rules at reading data out of display RAM, after address setting, the data of assigned
address is shown directly after the end of the read command, so pay attention that assigned data is
available at 2nd timing step.
In other words, 1 cycle dummy read is needed after address setting and write cycle.
DATA WRITE IN OPERATION
DATA READ OUT OPERATION
caution) When 16 bit mode, do write in and read out by 16 bit not only RAM access but also command
setting.
\]^
_`
]a
b
n
n+2
D
0
~D
15
WR
BUS HOLDER
WR
n
n+1
n+2
n+3
n+4
n+1
n+3
n+4
D
0
~D
7
(D
0
~D
15
)
RD
n
n
n+1
n+2
data read
n+2 address
WR
address set
n
dummy
read
data read
n address
data read
n+1 address
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HM202N10 | 2,000V - 4,000V Miniature Hybrid Multiplier |
| HM202N8 | 2,000V - 4,000V Miniature Hybrid Multiplier |
| HM202P08 | 2,000V - 4,000V Miniature Hybrid Multiplier |
| HM202P10 | 2,000V - 4,000V Miniature Hybrid Multiplier |
| HM202P8 | 2,000V - 4,000V Miniature Hybrid Multiplier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM17CM4096 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:128XRGBX162 OUTPUT LCD DRIVER IC with built-in RAM |
| HM18 | 制造商:BITECH 制造商全稱:Bi technologies 功能描述:Common-Mode Chokes |
| HM180K | 制造商:Ohmite Mfg Co 功能描述: |
| HM18-10001 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EE Style Common-Mode Chokes |
| HM18-10002 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EE Style Common-Mode Chokes |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。