參數(shù)資料
型號: HM17CM256
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 顯示驅(qū)動器
英文描述: 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
中文描述: LIQUID CRYSTAL DISPLAY DRIVER, UUC580
封裝: 19.75 X 2.39 MM, GOLD BUMP, DIE-580
文件頁數(shù): 52/111頁
文件大?。?/td> 2094K
代理商: HM17CM256
HM17CM256
- 52 -
INSTRUCTION TABLE (5)
CODE (80 series I/F)
CODE
INSTRUCTION
CS RS RD WR RE
2
RE
1
RE
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
FUNCTION
Gradation palette C
5
set
(lower)
[0
H
] 0
1
1
0
1
0
0
0
0
0
0
PC
53
PC
52
PC
51
PC
50
Set value to gradation palette
C
5
Gradation palette C
5
set
(upper)
[1
H
] 0
1
1
0
1
0
0
0
0
0
1
*
*
*
PC
54
Set value to gradation palette
C
5
Gradation palette C
6
set
(lower)
[2
H
] 0
1
1
0
1
0
0
0
0
1
0
PC
63
PC
62
PC
61
PC
60
Set value to gradation palette
C
6
Gradation palette C
6
set
(upper)
[3
H
] 0
1
1
0
1
0
0
0
0
1
1
*
*
*
PC
64
Set value to gradation palette
C
6
Gradation palette C
7
set
(lower)
[4
H
] 0
1
1
0
1
0
0
0
1
0
0
PC
73
PC
72
PC
71
PC
70
Set value to gradation palette
C
7
Gradation palette C
7
set
(upper)
[5
H
] 0
1
1
0
1
0
0
0
1
0
1
*
*
*
PC
74
Set value to gradation palette
C
7
Display start command
set
[6
H
]
0
1
1
0
1
0
0
0
1
1
0
*
SC
2
SC
1
SC
0
Common drive scan start line
set
Serial extension CS
control
[7
H
] 0
1
1
0
1
0
0
0
1
1
1
*
*
*
EX
CS
Serial I/F, extension CS port
(EXCS) control
Display selection
control
[8
H
] 0
1
1
0
1
0
0
1
0
0
0
PW
M
GL
SB
*
*
Gradation display set
RAM data length set
[9
H
] 0
1
1
0
1
0
0
1
0
0
1
*
*
CKS S
RAM access data length set
8 bit/16 bit selection
Electric volume
control
(lower)
[A
H
] 0
1
1
0
1
0
0
1
0
1
0
DV
3
DV
2
DV
1
DV
0
Electric volume level set
(lower bit)
Electric volume
control
(upper) [B
H
] 0
1
1
0
1
0
0
1
0
1
1
*
DV
6
DV
5
DV
4
Electric volume level set
(upper bit)
Oscillator Rf control
[D
H
] 0
1
1
0
1
0
0
1
1
0
1
FFL
RF
2
RF
1
RF
0
RF: oscillator feed back resistor set
FFL: oscillator frequency control
discharge
[E
H
] 0
1
1
0
1
0
0
1
1
1
0
*
*
*
DIS
V
LCD
,
discharge
V
1
~V
4
capacitor
RE register set
[F
H
] 0
1
1
0 0/1 0/1 0/1 1
1
1
1
TST
0
RE
2
RE
1
RE
0
RE flag set
Internal register read
address set
[C
H
]
0
1
1
0
1
0
0
1
1
0
0
Register read
address
Internal
address set
register
read
out
Internal register read
0
1
0
1 0/1 0/1 0/1 *
*
*
*
Read Data
Internal register read out
Notice 1) * mark is Don’t Care
Notice 2) [ ] The inner side number is an address for internal register read.
Notice 3) The commands that upper/lower register settings are demanded are effective at the point of commands input.
But electric volume is effective after upper and lower register setting.
Notice 4) CKS=0: internal oscillation mode
CKS=1: external oscillation mode
Default CSK=0
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