HM17CM256
- 58 -
(34-9) Increment control register set
CS
RS
RD
WR
RE
2
RE
1
RE
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
1
1
0
0
0
0
1
0
1
0
WIN AIM
AYI
AXI
(reset :{WIN, AIM, AYI, AXI}=0
H
, read address :A
H
)
* : ”Don’t care”
Sets the display RAM address to increment mode when RAM data is accessed.
Per RAM write or read access, the increment or non-increment settings of X and Y address counter are
possible by AIM, AYI, AXI register setting. When accessing consecutive RAM areas by read or write,
the address increment operation is possible without setting the read or write address by this register setting.
After setting the auto increment register, the X, Y address should be set lower bits first.
Please revise X, Y address register after increment register setting.
When WIN register is set to “1”, the CPU accesses specified area of display RAM. In this case X, Y
address should be used with auto increment mode set (AXI=”1”, AYI=”1”). Do not revise X, Y address
register when it is not auto increment mode.
WIN=”0”: normal display RAM access
WIN=”1”: window area access at display RAM
The window to be accessed is defined by setting the start X, Y address and end X, Y address.
When accessing display with window area mode, please set X, Y start address and then X, Y window
end address.
When accessing consecutive RAM area, it is possible to access next location without setting the address
by using this command. X, Y address is unknown after auto increment setting. When WIN register is set
to “1”, the RAM should be accessed after setting start point address and end point address.
And address setting should be done in sequence of start point of X address and Y address, and then
end point of X address and Y address after WIN command setting ( WIN=”1”).
The relationship between AIM, AYI, AXI register and X, Y address increment mode is as follow.
AIM
Increment timing selection
0
Both case of writing in and read out display RAM
1
Only when writing in display RAM( read modify)
Remark
notice
notice
This mode is valid when read or write is performed on consecutive RAM location.
This mode is valid when read out consecutive data and modifying the data and then write them in again or
read
write per access.
AYI
0
0
1
1
AXI
0
1
0
1
Increment timing selection
Remark
No increment
X address auto increment
Y address auto increment
X, Y address auto increment
notice
notice
Regardless of AIM setting, no auto increment for X and Y address
According to AIM setting, auto increment only for X address.
And X address is increased as followed loop according to REF register( SEG output direction setting
register ) value.
) Please refer to
RAM address bitmap
in
(10) relation between display RAM and address
notice
According to AIM setting, auto increment only for Y address
Y address is increased as followed loop regardless of REF register
.
00
H
Max
H