參數(shù)資料
型號: HM17CM256
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 顯示驅(qū)動(dòng)器
英文描述: 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
中文描述: LIQUID CRYSTAL DISPLAY DRIVER, UUC580
封裝: 19.75 X 2.39 MM, GOLD BUMP, DIE-580
文件頁數(shù): 74/111頁
文件大?。?/td> 2094K
代理商: HM17CM256
HM17CM256
- 74 -
BT command : inversion timing selection at line inversion display
BT=”0”: Negative tone display in specified area
BT=”1”: The image of specified area is blinked by every 32 frame.
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Display example (BT=”1”)
And be cautious that LREV and BT commands have no influence on dummy segment driver circuit.
And the image selected by COMI
0
, COMI
1
is excluded.
HYUNDAI
LCD DRIVER
Low Power and
Low Voltage
HYUNDAI
LCD DRIVER
Low Power and
Low Voltage
Line inversion display example (LREV=”1”,BT=”1”)
(34-30) Dummy segment driver address selection ( Refer to dummy segment drive related description. )
CS
RS
RD
WR
RE
2
RE
1
RE
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
1
1
0
1
0
1
1
0
0
1
*
*
*
DMY
( reset :{DMY}=0
H
, read address :8
H
)
* : “Don’t care”
When data is to be written to dummy segment driver, this register is active (DMY=”1”).
DMY=”0”: normal display RAM access
DMY=”1”: display data access to dummy segment driver
Normal segment drivers acquire display data from display RAM, but dummy segment drivers acquire
display data from corresponding register not from display RAM. The capacity of register is 4 bytes.
That is correspond to SEGSA
0
~SEGSA
3
SEGSB
0
~SEGSB
3
±
±
SEGSC
0
~SEGSC
3
output.
When accessing with DMY = “1”, address setting is valid by only X address. There is 4 byte capacity,
and so 00
H
, 01
H
, 02
H
, 03
H
is valid at 8 bits mode and 00
H
, 01
H
is valid at 16 bits mode. There is no
Changes per
every 32 frame.
2
line inversioin start address
line inversioin end address
2
Changes per
every 32 frame.
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