參數(shù)資料
型號(hào): HM17CM256
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 顯示驅(qū)動(dòng)器
英文描述: 128XRGBX82 OUTPUT LCD DRIVER IC with built-in RAM
中文描述: LIQUID CRYSTAL DISPLAY DRIVER, UUC580
封裝: 19.75 X 2.39 MM, GOLD BUMP, DIE-580
文件頁數(shù): 62/111頁
文件大小: 2094K
代理商: HM17CM256
HM17CM256
- 62 -
(34-12) Boosting coefficient setting
CS
RS
RD
WR
RE
2
RE
1
RE
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
1
1
0
0
0
0
1
1
0
1
*
VU
2
VU
1
VU
0
( reset :{VU
2
~VU
0
}=0
H
read address :D
H
)
* : ”Don’t care”
coefficient setting of boosting circuit
VU
2
0
0
0
0
1
1
1
1
VU
1
0
0
1
1
0
0
1
1
VU
0
0
1
0
1
0
1
0
1
*V
REG
amplifier gain is 1.
Boosting multiple
No boosting *
2 times boosting operation
3 times boosting operation
4 times boosting operation
5 times boosting operation
6 times boosting operation
7 times boosting operation
forbidden
(34-13) Bias setting register
CS
RS
RD
WR
RE
2
RE
1
RE
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
1
1
0
0
0
0
1
1
1
0
*
B
2
B
1
B
0
( reset :{B
2
~B
0
}=0
H
read address : E
H
)
* : ”Don’t care”
The bias ratio is selected by this register. 1/10, 1/9, 1/8, 1/7, 1/6, 1/5 biases can be selected by B
2
, B
1
and B
0
register.
B
2
0
0
0
0
1
1
1
1
B
1
0
0
1
1
0
0
1
1
B
0
0
1
0
1
0
1
0
1
bias
Operating under 1/9 bias
Operating under 1/8 bias
Operating under 1/7 bias
Operating under 1/6 bias
Operating under 1/5 bias
Operating under 1/10 bias
forbidden
forbidden
(34-14) RE flag state register setting.
CS
RS
RD
WR
RE
2
RE
1
RE
0
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
1
1
0
0/1
0/1
read address :F
H
)
0/1
1
1
1
1
TST
0
RE
2
RE
1
RE
0
( reset :{TST
0
, RE
2
, RE
1
, RE
0
}=0
H
Setting the register of command extension register(RE
2
, RE
1
, RE
0
). When accessing command
register, the extension register corresponding flag should be set first, and then access it. The TST
0
register is that for test, and so please set to “0”.
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