參數(shù)資料
型號(hào): CYP15G0101
廠商: Cypress Semiconductor Corp.
英文描述: Single-channel HOTLink Transceiver
中文描述: 單通道的HOTLink收發(fā)器
文件頁(yè)數(shù): 33/78頁(yè)
文件大?。?/td> 1555K
代理商: CYP15G0101
CYP15G04K100V1-MGC
CYP15G04K200V2-MGC
PRELIMINARY
Document #: 38-02044 Rev **
Page 33 of 78
INA1+
INA1
INA2+
INA2
TXLBA
INSELA
INB1+
INB1
INB2+
INB2
INSELB
TXLBB
INC1+
INC1
INC2+
INC2
TXLBC
INSELC
IND1+
IND1
IND2+
IND2
TXLBD
INSELD
Character-Rate Clock
Clock &
Data
Recovery
PLL
S
Clock &
Data
Recovery
PLL
S
Clock &
Data
Recovery
PLL
S
Clock &
Data
Recovery
PLL
S
LPEN
LFID
LFIC
LFIB
LFIA
8
RXSTC[2:0]
RXDC[7:0]
3
8
RXSTB[2:0]
RXDB[7:0]
3
8
RXSTD[2:0]
RXDD[7:0]
3
8
RXSTA[2:0]
RXDA[7:0]
3
Receive
Signal
Monitor
Receive
Signal
Monitor
Receive
Signal
Monitor
Receive
Signal
Monitor
O
R
O
R
O
R
O
R
E
B
F
RXCLKD+
1
B
E
B
1
B
F
E
B
1
B
F
E
B
1
B
F
÷
2
RXCLKC+
÷
2
RXCLKB+
÷
2
RXCLKA+
÷
2
RXRATE
RFEN
FRAMCHAR
RFMODE
RXCKSEL
DECMODE
RXMODE[1:0]
SDASEL
JTAG
Boundary
Scan
Controller
TDO
TMS
TCLK
TDI
Clock
Select
Clock
Select
Clock
Select
Clock
Select
Bonding
Control
BOND_ALL
BOND_INH
MASTER
BONDST
TRSTZ
2
2
Receive Path Block Diagram
= Internal Signal
RBIST[D:A]
RX PLL Enable
Latch
RXLE
BOE[7:0]
相關(guān)PDF資料
PDF描述
CYP15G0101DXB Single-channel HOTLink Transceiver
CYP15G0101DXB-BBC Single-channel HOTLink Transceiver
CYP15G0101DXB-BBI Single-channel HOTLink Transceiver
CYPOSIC2GVC-K Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
CYS25G0101DX Physical Layer Devices
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYP15G0101DXA 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Single Channel HOTLink II Transceiver
CYP15G0101DXA-BBC 制造商:Cypress Semiconductor 功能描述:PHY 1-CH 100-Pin TBGA
CYP15G0101DXA-BBI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Single Channel HOTLink II Transceiver
CYP15G0101DXB 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Single-channel HOTLink II⑩ Transceiver
CYP15G0101DXB_11 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Single-channel HOTLink II Transceiver Compliant to multiple standards