
DATA BOOK v1.5
May 1997
8
LIST OF FIGURES
CL-PS7110
Low-Power System-on-a-Chip
LIST OF FIGURES
Figure 1-1.
Figure 1-2.
Figure 1-3.
Figure 1-4.
Figure 1-5.
Figure 1-6.
Figure 1-7.
Figure 1-8.
Figure 4-1.
Figure 4-2.
Figure 4-3.
Figure 4-4.
Figure 4-5.
Figure 4-6.
Figure 4-7.
Functional Block Diagram.......................................................................................11
Word Write to 16-bit SRAM.....................................................................................16
Word Write to 8-bit SRAM.......................................................................................17
Memory Segment Usage........................................................................................18
Video Buffer Mapping .............................................................................................22
Sample Schematic for Positive V
EE
Control Circuitry .............................................25
Sample Schematic for Negative V
EE
Control Circuitry............................................26
State Diagram.........................................................................................................28
Expansion and ROM Read Timing..........................................................................63
Expansion and ROM Write Timing..........................................................................64
DRAM Read Cycles................................................................................................65
DRAM Write Cycles................................................................................................66
Video Quad Word Read..........................................................................................67
DRAM CAS-Before-RAS Refresh Cycle.................................................................68
LCD Controller Timing ............................................................................................69