- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379877 > celeron CPU with Mobile Module (Intel Corp.) processor Mobile Module Connector 2 (MMC-2) at 466 MHz and 433MHZ(工作頻率466和433兆赫茲帶連接器2處理器) PDF資料下載
參數(shù)資料
| 型號： | celeron CPU with Mobile Module |
| 廠商： | Intel Corp. |
| 英文描述： | processor Mobile Module Connector 2 (MMC-2) at 466 MHz and 433MHZ(工作頻率466和433兆赫茲帶連接器2處理器) |
| 中文描述： | 移動處理器模塊連接器2（MMC管理- 2），466 MHz和433MHz的（工作頻率466和433兆赫茲帶連接器2處理器） |
| 文件頁數(shù)： | 9/47頁 |
| 文件大?。?/td> | 410K |
| 代理商： | CELERON CPU WITH MOBILE MODULE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁
Celeron
Processor Mobile Module MMC-2
at 466 MHz and 433 MHz
5
3.1.2
Memory (109 Signals)
Table 2 lists the memory interface signals.
Table 2. Memory Signal Descriptions
Name
Type
Voltage
Description
MECC[7:0]
I/O
CMOS
O
CMOS
V_3
Memory ECC Data:
These signals carry Memory ECC data during access to DRAM.
RASA[5:0]# or
CSA[5:0]#
V_3
Row Address Strobe (EDO):
These pins select the DRAM row.
Chip Select (SDRAM):
These pins activate the SDRAMs.
SDRAM accepts any
command when its CS# pin is active low.
CASA[7:0]# or
DQMA[7:0]
O
CMOS
V_3
Column Address Strobe (EDO):
These pins select the DRAM column.
Input/Output Data Mask (SDRAM):
These pins act as synchronized output enables
during a read cycle and as a byte mask during a write cycle.
MAB[9:0]#
MAB[10]
MAB[12:11]#
MAB[13]
O
CMOS
V_3
Memory Address (EDO/SDRAM):
This is the row and column address for DRAM.
The
82433BX Host Bridge system controller has two identical sets of address lines (MAA
and MAB#). The module supports only the MAB set of address lines. For additional
addressing features, please refer to the
Intel
a
440BX AGPset Datasheet.
MWEA#
O
CMOS
O
CMOS
V_3
Memory Write Enable (EDO/SDRAM):
MWEA# should be used as the write enable for
the memory data bus.
SRASA#
V_3
SDRAM Row Address Strobe (SDRAM):
When active low, this signal latches Row
Address on the positive edge of the clock. This signal also allows Row access and pre-
charge.
SCASA#
O
CMOS
V_3
SDRAM Column Address Strobe (SDRAM):
When active low, this signal latches
Column Address on the positive edge of the clock.
This signal also allows Column
access.
CKE[5:0]
O
CMOS
V_3
SDRAM Clock Enable (SDRAM):
SDRAM clock enable pin. When these signals are
deasserted, SDRAM enters power-down mode.
Each row is individually controlled by its
own clock enable.
MD[63:0]
I/O
CMOS
V_3
Memory Data:
These signals are connected to the DRAM data bus. They are not
terminated on the Celeron processor mobile module MMC-2.
相關PDF資料 |
PDF描述 |
|---|---|
| Celeron Processor with mobile | Celeron Processor Mobile Module MMC-1 at 400 MHz, 366 MHz, 333 MHz, and 300 MHz(工作頻率400,366,333,300和266兆赫茲帶移動模塊和連接器1處理器) |
| celeron processor | 32 bit Celeron Processor Mobile Module(32 位帶移動模塊處理器) |
| CEM11C2 | Dual Enhancement Mode Field Effect Transistor (N and P Channel) |
| CEM2005 | Dual Enhancement Mode Field Effect Transistor(N and Channel) |
| CEM2030A | Dual Enhancement Mode Field Effect Transistor(N and P Channel) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CELF001001J1 | 制造商:Panasonic Industrial Company 功能描述:FILTER |
| CELHK11-1REC5-59-3.00-AV-01-V | 功能描述:CIRCUIT BRKR MAG-HYDR LEVER 3A 制造商:sensata technologies/airpax 系列:CEL 零件狀態(tài):有效 斷路器類型:磁性（液力延遲） 額定電流:3A 額定電壓 - AC:- 額定電壓 - DC:- 極數(shù):2 致動器類型:搖臂 照明:- 照明電壓（標稱值）:- 安裝類型:面板安裝 標準包裝:1 |
| CELHK11-1REC5-59-35.0-AV-01-V | 功能描述:CIRCUIT BRKR MAG-HYDR LEVER 35A 制造商:sensata technologies/airpax 系列:CEL 零件狀態(tài):有效 斷路器類型:磁性（液力延遲） 額定電流:35A 額定電壓 - AC:- 額定電壓 - DC:- 極數(shù):2 致動器類型:搖臂 照明:- 照明電壓（標稱值）:- 安裝類型:面板安裝 標準包裝:1 |
| CELHK11-1REC5-71165-10-V | 功能描述:CIRCUIT BREAKER MAG-HYDR LEVER 制造商:sensata technologies/airpax 系列:* 零件狀態(tài):有效 標準包裝:1 |
| CELHK11-1REC5-71165-11-V | 功能描述:CIRCUIT BREAKER MAG-HYDR LEVER 制造商:sensata technologies/airpax 系列:* 零件狀態(tài):有效 標準包裝:1 |
發(fā)布緊急采購，3分鐘左右您將得到回復。