參數(shù)資料
型號(hào)： celeron CPU with Mobile Module
廠商： Intel Corp.
英文描述： processor Mobile Module Connector 2 (MMC-2) at 466 MHz and 433MHZ(工作頻率466和433兆赫茲帶連接器2處理器)
中文描述： 移動(dòng)處理器模塊連接器2（MMC管理- 2），466 MHz和433MHz的（工作頻率466和433兆赫茲帶連接器2處理器）
文件頁(yè)數(shù)： 14/47頁(yè)
文件大小： 410K
代理商： CELERON CPU WITH MOBILE MODULE
Celeron
Processor Mobile Module MMC-2
at 466 MHz and 433 MHz
10
3.1.7
Power Management (7 Signals)
Table 7 lists the power management signals. The SM_CLK
and SM_DATA signals refer to the two-wire serial SMBus
interface. Although this interface is currently used solely for
the digital thermal sensor, the SMBus contains reserved
serial addresses for future use. See section 4.9, “Thermal
Sensor Configuration Register” for more details.
Table 7. Power Management Signal Descriptions
Voltage
Name
Type
Description
SUS_STAT1#
I
CMOS
V_3ALWAY
1
Suspend Status:
This signal connects to the SUS_STAT1# output of PIIX4E/M. It
provides information on host clock status and is asserted during all suspend states.
VR_ON
I
CMOS
V_3
VR_ON:
Voltage regulator ON.
This 3.3-V (5.0-V tolerant) signal controls the operation
of the voltage regulator.
VR_ON should be generated as a function of the PIIX4E/M
SUSB# signal which is used for controlling the “Suspend State B” voltage planes. This
signal should be driven by a digital signal with a rise/fall time of less than or equal to 1
us. Refer to section 4.7.2.1 ‘”Voltage Signal Definitions and Sequences.” (VIL
(max)=0.4V, VIH (min)=3.0V).
VR_PWRGD
O
V_3
VR_PWRGD:
This signal is driven high by the module to indicate that the voltage
regulator is stable. The signal is pulled low using a 100-K resistor when inactive.
It can
be used in some combination to generate the system PWRGOOD signal.
BXPWROK
I
CMOS
I/O D
CMOS
I/O D
CMOS
O D
CMOS
V_3
Power OK to BX:
This signal must go active 1 mS after the V_3 power rail is stable,
and 1 ms prior to deassertion of PCIRST#.
SM_CLK
V_3
Serial Clock:
This clock signal is used on the SMBus interface to the digital thermal
sensor.
SM_DATA
V_3
Serial Data:
Open-drain data signal on the SMBus interface to the digital thermal
sensor.
ATF_INT#
V_3
ATF Interrupt:
This signal is an open-drain output signal of the digital thermal sensor.
NOTE:
1.
V_3ALWAYS: 3.3V supply. It is generated whenever V_DC is available and supplied to PIIX4E/M resume well.
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