參數(shù)資料
型號: AT89C51SND2C-7FTUL
廠商: Atmel
文件頁數(shù): 82/160頁
文件大小: 0K
描述: IC 8051 MCU FLASH 64K MP3 100BGA
標準包裝: 260
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,IDE/ATAPI,MMC,SPI,UART/USART,USB
外圍設(shè)備: 音頻,I²S,MP3,PCM,POR,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
RAM 容量: 2.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.3 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TFBGA
包裝: 托盤
其它名稱: AT89C51SND2C7FTUL
DS785UM1
7-23
Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7
Please note that as the frame number progresses, the bit pattern in each row moves to the
right one pixel. This type of pattern shown in an area may cause diagonal lines to appear as
though they are moving to the right. As previously stated, any image distortion greatly
depends on the application. However, the pattern shown in Figure 7-7 will have less of a
tendency to demonstrate a walking distortion.
Figure 7-7. Creating Bit Patterns that Move to the Right
Assuming that the 3-bit input pattern that represents this 33% duty cycle grayscale is 0x2 (or
010b), the values in Table 7-8 are used to program this pattern into the grayscale look-up-
table. In this mode, the X locations are ignored by the grayscale generation.
Finally, just for demonstration purposes, a matrix with mixed 3 and 4 count axes is shown in
Frame 0
H O R Z
Frame 1
V
100
010
E
001
010
R
010
001
T
Frame 2
001
100
Table 7-8. Programming 33% Duty Cycle into the Lookup Table
Frame
Vert
Horz
VCNT (lines)
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
GrySclLUT
Address *4
Ctr
HCNT
(pixels)
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Frame
Pixel
Value
D18
D17
D16
register
address
D
1
5
D
1
4
D
1
3
D
1
2
D
1
D
1
0
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
base + 0x08
X
0
1
0
X
1
0
X
0
1
00
010
base + 0x28
X
1
0
X
0
1
0
X
0
1
0
01
010
base + 0x48
X
0
1
X
0
1
X
1
0
10
010
base + 0x68
X
11
010
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