參數(shù)資料
型號: AT89C51SND2C-7FTUL
廠商: Atmel
文件頁數(shù): 78/160頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 64K MP3 100BGA
標(biāo)準(zhǔn)包裝: 260
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: I²C,IDE/ATAPI,MMC,SPI,UART/USART,USB
外圍設(shè)備: 音頻,I²S,MP3,PCM,POR,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 64KB(64K x 8)
程序存儲器類型: 閃存
RAM 容量: 2.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.3 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TFBGA
包裝: 托盤
其它名稱: AT89C51SND2C7FTUL
DS785UM1
7-19
Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7
At clock 0, the HCNT, VCNT and FRAME counters are 0x0. The pixel to display is a 5, which
translates to register base + 0x94, bit D0. At the next clock tick, the fastest running counter
(HCNT) has incremented, but VCNT and FRAME remain the same. Given the same pixel
value (5), bit position D1 is used as the value that is sent to the display.
18
3
0
5
(base + 94) / D15
19
20
0
1
5
(base + b4) / D0
21
1
0
1
5
(base + b4) / D1
22
2
0
1
5
(base + b4) / D2
23
3
0
1
5
(base + b4) / D3
24
25
0
2
5
(base + d4) / D0
26
1
0
2
5
(base + d4) / D1
27
2
0
2
5
(base + d4) / D2
28
3
0
2
5
(base + d4) / D3
29
30
0
3
5
(base + f4) / D0
31
1
0
3
5
(base + f4) / D1
32
2
0
3
5
(base + f4) / D2
33
3
0
3
5
(base + f4) / D3
Table 7-6. Programming Format
Fra
me
Ve
rt
Ho
rz
VCNT
(lines)
11
10
1
0
1
0
1
0
1
0
1
0
1
0
GrySclLU
T
Address
*4
Ctr
Ct
r
Ctr
HCNT
(pixels)
11
10
01
00
11
10
0
1
0
1
0
1
0
1
0
1
0
Frame
Pix
el
D18
D
17
D1
6
register
address
D
15
D
14
D
13
D
12
D
11
D1
0
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Val
ue
XX
X
base +
0x00
0
000000000
0
00
000
base +
0x20
0
000000000
0
01
000
base +
0x40
0
000000000
0
10
000
base +
0x60
0
000000000
0
11
000
XX
X
base +
0x1C
1
111111111
1
00
111
base +
0x3C
1
111111111
1
01
111
base +
0x5C
1
111111111
1
10
111
base +
0x7C
1
111111111
1
11
111
Table 7-5. Grayscale Timing Diagram (Continued)
Clock
HCNT
VCNT
FRAME
PIXEL
Register Address / Value
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